Integrated circuit packaging systems with double surface heat dissipation

A mounting arrangement for a semiconductor chip having a bottom surface and a top surface with an integrated circuit fashioned thereon, including a plurality of bonding pads disposed around the periphery of said top surface comprising:

• (a) a printed circuit substrate having a substantially planar top surface with a bonding pad and circuit lead arrangement formed thereon;
• (b) means for mounting said semiconductor chip on said substrate in an inverted orientation with said top surface of said chip separated from the top surface of said substrate and including means for electrically connecting said chip bonding pads to said bonding pad and circuit lead arrangement of said substrate;
• (c) a first heat sink mounted to said bottom surface of said chip;
• and
• (d) a second heat sink having a first surface mounted to a portion of said top surface of said chip interior to said bonding pads and a second surface mounted to said top surface of said substrate, wherein said top surface of said chip has a passivation layer of electrical insulating material deposited thereon and a layer formed over a portion of said passivation layer interior to said bonding pads to provide a mounting pad for said second heat sink and wherein said second mounting means includes a low temperature alloy for bonding said second heat sink to said mounting pad.

A mounting arrangement for a semiconductor chip having a bottom surface and a top surface with an integrated circuit fashioned thereon comprising:

• (a) a printed circuit substrate having a top surface with a chip mounting pad and a bonding pad and circuit arrangement formed thereon;
• (b) means for mounting said bottom surface of said semiconductor chip to said chip mounting pad in good heat transfer relation;
• (c) means for connecting said bonding pads on said chip to said bonding pad and circuit lead arrangement on said substrate;
• (d) a heat sink having a bottom mounting area substantially corresponding to an area of said top surface of said chip interior to said bonding pad;
• and
• (e) means for mounting said heat sink to said top surface area of said chip in good heat transfer relation, wherein said top surface of said chip has a passivation layer of electrical insulating material deposited thereon and a layer formed over a portion of said passivation layer interior to said bonding pads to provide a mounting pad for said heat sink.

An article of manufacture for mounting an integrated circuit chip, said chip having a first side with a plurality of bonding pads for bonding of a plurality of leads to said chip and a second side, said article comprising:

• (a) a first heat sink having a first mounting surface adapted for bonding to said second side of said chip;
• (b) a first mounting means bonding said first mounting surface to said second side of said chip in good heat transfer relation;
• (c) a second heat sink having a second mounting surface adapted for bonding to said first side;
• (d) second mounting means including a low temperature alloy for bonding said second mounting surface to said first side of said chip in good heat transfer relation;
• (e) isolating means for insulating said second mounting means to prevent electrical connection of said chip to said second heat sink;
• and
• (f) encapsulating means for encapsulating said chip between said first heat sink and said second heat sink;
• (g) said first side of said chip having a passivation layer of electrical insulating material deposited thereon and a layer of gold formed over a portion of said passivation layer interior to said bonding pads to provide a mounting pad for said second heat sink.

A mounting arrangement for a semiconductor chip having a bottom surface and a top surface with an integrated circuit fashioned thereon, including a plurality of bonding pads disposed around the periphery of said top surface, comprising:

• (a) a printed circuit substrate having a substantially planar top surface with a bonding pad and circuit lead arrangement formed thereon;
• (b) means for mounting said semiconductor chip on said substrate in an inverted orientation with said top surface of said chip separated from the top surface of said substrate and including means for electrically connecting said chip bonding pads to said bonding pad and circuit lead arrangement of said substrate;
• (c) a first heat sink mounted to said bottom surface of said chip and a second heat sink having a first surface mounted rigidly to a portion of said top surface of said chip interior to said bonding pads and a second surface mounted rigidly to said top surface of said substrate, wherein said means for electrically connecting said chip bonding pads to said bonding pad and circuit lead arrangement of the substrate comprises a plurality of flexible connecting lead elements extending outwardly from said bonding pads around the periphery of said top surface of said clip and downwardly to said bonding pad and circuit lead arrangement of the substrate;
• whereby the flexible connecting lead elements allow mounting of said second heat sink on both said first surface and said second surface and wherein said top surface of said chip has a passivation layer of electrical insulating material deposited thereon and a layer of gold formed over a portion of said passivation layer interior to said bonding pads to provide a mounting pad for said second heat sink.