US 4,620,188 AGranted

Multi-level logic circuit

AssigneeDevelopment Finance Corporation of New Zealand

InventorChanty Sengchanh

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Abstract

A Multi-Level Logic Circuit is described, with the hardware of the circuit capable of being constructed to operate in a chosen base. The circuit includes at least: (a) One input level detector which can receive one or more multi-level inputs, (b) Control switching means, and (c) An output level generator delivering a single multi-level output. Various logic gates operating in any base can be derived from the generalized circuit of this invention. Basic multi-level logic gates include an (n-1) complementer, where an output of (n-1-a) is generated from a discrete input "a" where n is the base for which the circuit is constructed. A complementary maximum gate is also described in which the circuit provides the (n-1) complement of the highest logic level detected on input lines to the input level detector. Various other multi-level logic circuits can be constructed by combining the multi-level complementer, and multi-level complementary maximum gates. Circuits are also described where there are more than one input level detector or control switching means to provide binary operations on inputs to the multi-level logic circuits, e.g. addition, multiplication, in any desired base. Circuits are illustrated, constructed to operate in base 10. The multi-level logic circuit is similar to a binary circuit in that it operates on discrete logic levels. It is not an analog circuit.

Claims7

Dependent claims

A multi-level logic circuit operating in a base n where n is greater than 2, comprising

(a) first logic circuit means including
(1) a first input level detector having one multi-level detector for detecting any one of n logic levels and for producing a first output signal in response to an appropriate input logic level;
(2) a first control switching device connected with said first input level detector for producing a first select signal in response to the output signal from said first level detector;
and
(3) a first output level generator connected with said first control switching device for producing in response to said first selected signal an output of logic level (n-1-a), wherein a is the input logic level detected by said first input level detector;
and
(b) second logic circuit means including
(1) a second input level detector having a plurality of multi-level input lines arranged so that the highest logic level on one of said input lines is transmitted to the second input level detector which produces a second output signal in response to the highest logic level;
(2) a second control switching device connected with said second input level detector for producing a second selected signal in response to said second output signal;
and
(3) a second output level generator connected with said second control switching device for producing in response to said second select signal an output of logic level (n-1-a.sub.x), where a.sub.x is the highest logic level of the input logic levels (a.sub.1, a.sub.2, a.sub.3 . . . a.sub.k) detected by said second input level detector;
said first and second input level detectors each including voltage dependent input switching means, respectively, and said first and second output level generators each including a voltage divider capable of providing n different voltage outputs, respectively.

9 more elements

A multi-level logic circuit operating in a base n where n is greater than 2, comprising

(a) a first input level detector for detecting a first input logic level and for producing a first output signal in response to an appropriate input logic level;
(b) a second input level detector for detecting a second input logic level and for producing a second output signal n response to an appropriate input logic level;
(c) control switching means connected with said first and second input level detectors for producing first and second select signals in response to the first and second output signals;
and
(d) output level generator means connected with said control switching means for producing a logic output in accordance with said first and second select signals, whereby a binary operation on said two input logic levels is performed resulting in a single multi-level output;
said first and second input level detectors each comprising a one of n logic level recognizer having n outputs, respectively, the n outputs of a first logic level recognizer being used to switch a respective control switch which in turn by-passes a portion of said output level generator means, the n outputs of the second logic level recognizer being used to activate a further control switch connecting a supply to a particular point of the output level generator, whereby the combined operation of the two input level detectors enables said output operation on said two inputs.

3 more elements

Dependencies are inferred from the claim text.