Harmonic distortion reduction technique for data acquistion
AssigneeThe United States of America as represented by the Secretary of the Air Force
InventorWilliam P. Evans
Life of this patent
Estimating the term…
Loading patent…
AssigneeThe United States of America as represented by the Secretary of the Air Force
InventorWilliam P. Evans
Estimating the term…
An analog to digital converter (ADC) is presented which uses a calibration technique to reduce harmonic distortion in data acquisition systems. This mechanization also allows faster conversion rates than previously possible for high resolution analog-to-digital converters. This converter makes use of a subrange or "half Flash" architecture where the subrange digital-to-analog converter (DAC) is augmented with a software calibrated DAC which removes system nonlinearities. The advantage of this system is that it allows the building of higher speed data acquisition systems with higher spurious free dynamic range than would be possible with conventional techniques. By adding the correction to the input of the subrange ADC, correction resolution can be a fraction of a quanta. A second approach using the same mathematics places at the output of the ADC a RAM or ROM look up table which linearizes the transfer function.
A self-calibrating analog-to-digital converter which receives an analog input signal and outputs a digital signal while reducing harmonic distortion, said self-calibrating analog-to-digital converter comprising:
In combination with an analog-to-digital converter which has a transfer function and contains a main range encoder which quantizes input analog signal to produce an output signal, a digital-to-analog converter which receives said output signal of said main range encoder and produces on output analog signal, a subrange encoder which receives and quantizes said output analog signal from said digital-to-analog said output analog signal from said digital-to-analog converter to produce an output signal, and an adder which combines said output signals from said main range encoder and said subrange encoder to produce output digital signals that are approximately equivalent to said analog input signals, a process of calibrating said analog-to-digital converter, said process comprising the steps of:
Dependencies are inferred from the claim text.