Differential common base amplifier with feed forward circuit

A low noise differential common-base amplifier integrated circuit, comprising in combination:

• (a) first and second NPN transistors, each having a collector, a base, and an emitter;
• (b) first means for coupling the bases of said first and second NPN transistors together;
• (c) a first current source coupled to the collector of said first NPN transistor and a second current source coupled to the collector of said second NPN transistor;
• (d) a third NPN transistor having a base coupled to the collector of said second NPN transistor, a collector coupled to a third current source, and an emitter;
• (e) a first P-channel field effect transistor having a gate electrode coupled to receive a first input signal, a source coupled to the emitter of said first NPN transistor, and a drain coupled to a first supply voltage conductor, and a second P-channel field effect transistor having a gate electrode coupled to receive a second input signal, a source coupled to the emitter of said second NPN transistor, and a drain coupled to said first supply voltage conductor;
• and
• (f) a third P-channel field effect transistor having a gate coupled to the gate of said first P-channel field effect transistor, a source coupled to the emitter of said third NPN transistor, and a drain coupled to the first supply voltage conductor.

A method for operating a differential common-base amplifier circuit to attain very low noise operation, said method comprising the steps of:

• (a) providing first and second transistors, each having a collector, a base, and an emitter and coupling the bases of said first and second transistors together;
• (b) coupling a first current source to the collector of said first transistor to supply a collector current thereto, and coupling a second current source to the collector of said second transistor to supply a collector current thereto;
• (c) providing a third transistor having a base coupled to the collector of said second transistor, a collector coupled to a third current source means, and an emitter;
• (d) applying a first input signal to a gate electrode of a first field effect transistor having a source coupled to the emitter of said first transistor, and a drain coupled to a first supply voltage conductor, and applying a second input signal to a gate electrode of a second field effect transistor having a source coupled to the emitter of said second transistor, and a drain coupled to the first supply voltage conductor;
• and
• (e) also applying said first input signal to a gate electrode of a third field effect transistor having a source coupled to the emitter of said third transistor and a drain coupled to the first supply voltage conductor, whereby the V.sub.GS characteristic of said second field effect transistor closely tracks with the V.sub.GS characteristic of said third field effect transistor so that variations in the voltage of the emitter of said second transistor due to variations in the V.sub.GS characteristic of said second field effect transistor are also produced at the collector of said second transistor in response to said third field effect transistor, thereby substantially eliminating charges in the collector to base voltage of said second transistor due to variations in the V.sub.GS characteristic of said second field effect transistor.