Method for double doping sources and drains in an EPROM

A method for making an EPROM integrated circuit comprising

• (a) forming an insulative layer over a silicon substrate, the region of said substrate at which an EPROM device is to be formed having a conductivity of one type;
• (b) forming a floating gate over said isolation layer at a central portion of a region of said substrate at which said EPROM device is to be formed;
• (c) implanting ions of a first kind through said insulating layer into said substrate, at two subregions within said EPROM region that are on opposite sides of and adjacent to said floating gate to form the source and drain of said EPROM device;
• (d) implanting ions of a second kind through said insulating layer into said substrate at said two subregions, wherein said first and second kind are of the opposite conductivity type relative to said EPROM substrate region, and wherein said second kind of ions has a greater coefficient of diffusion in silicon than do ions of said first kind;
• (e) forming a mask over said substrate, said mask having an aperture for exposing a portion of said EPROM device region through which said implantings are selectively effected and self aligned with said floating gate at said two sub-regions;
• and
• (f) heating said substrate to cause said first kind ions to form a drain-core and a source-core having a high impurity concentration and to cause said ions of said second kind to extend laterally about 0.1 micron under said floating gate from said cores to form a relatively low impurity concentration region beyond said high concentration core, to shorten the channel length to less than the width of said floating gate between said source and drain, and to improve the programing efficiency of said EPROM device.