Decision feedback equalizing apparatus

The method of non-linearly equalizing a digital bit pulse stream comprising the steps of:

• generating a substantially non-time delayed logical level based decision feedback first signal based on the amplitude of the present bit in a digital bit stream for enhancing the amplitude of the present bit in the digital bit pulse stream;
• generating a time delayed logical level based decision feedback second signal for reducing intersymbol interference;
• and
• combining said first and second signals and incorporating them in a feedback manner with the digital bit pulse stream to modify the characteristics thereof.

The method of restoring pulse amplitude during decision processing delayed feedback intersymbol interference equalization of a digital pulse bit stream comprising the steps of:

• logic level decision detecting the amplitude of the present bit in a pulse bit stream;
• generating a substantially non-time delayed square pulse first signal in accordance with said detection;
• and
• returning said first signal, as a positive feedback signal, to the pulse bit stream without delay to enhance present bit amplitude.

Apparatus for equalizing a digital data bit in a digital signal stream comprising, in combination

• level detecting first means for detecting a summed first signal to be equalized and outputting a positive feedback and further square pulse opposite phase second and third signals respectively each indicative in polarity of the value of said first signal relative a reference;
• time delaying second means, connected to said first means, for delaying said third signal by an amount equivalent to the repetition rate for one data bit to produce a delayed fourth signal;
• summing third means, connected to said first and second means, for summing said second and fourth signals in a weighted algorithm to produce a composite feedback signal;
• signal input fourth means for supplying a fifth signal to be equalized;
• and
• summing fifth means, connected to said first, third and fourth means, for summing said composite feedback signal with a digital pulse signal to be equalized to produce said summed first signal, said summed first signal providing equalized output information.

Apparatus for equalizing a digital data bit stream comprising in combination:

• first means for supplying a digital data bit stream to be equalized;
• level detecting second means, connected to said first means for receiving said bit stream therefrom, for providing a positive decision feedback signal, for enhancing the logic level of the present bit in said digital data bit stream, obtained through level detection of the present bit in the data bit stream;
• level detecting third means, connected to said first means, for providing a further feedback signal, for neutralizing intersymbol interference on the present bit, by delaying a signal, obtained through level detection and of a phase opposite said positive decision feedback signal, by a time corresponding to its time of occurrence relative the present bit;
• and
• fourth means, connected to said second and third means, for summing said positive decision and further feedback signals and applying same in a feedback manner to the digital bit stream to be equalized.

Apparatus for non-linearly equalizing a digital bit pulse stream commprising, in combination:

• first means for generating a substantially non-time delayed logical level based desision feedback first signal based on the amplitude of the present bit for enhancing the amplitude of the present bit in a digital bit pulse stream;
• second means for generating a time delayed logical level based decision feedback second signal for reducing intersymbol interference;
• and
• third means for combining said first and second signals and incorporating them in a feedback manner with the digital bit pulse stream to modify the characteristics thereof.

Apparatus for restoring pulse amplitude during decision processing delayed feedback intersymbol interference equalization of a digital pulse bit stream comprising, in combination:

• first means for logic level decision detecting the amplitude of the present bit in a pulse bit stream;
• and
• second means for generating a square pulse first signal in accordance with said detection;
• third means for returning said first signal, as a positive decision feedback signal, to the pulse bit stream without any substantial time delay to enhance present bit amplitude.