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US 4,581,620 AGranted
Semiconductor device of non-single crystal structure
AssigneeShunpei Yamazaki
InventorsShunpei Yamazaki, Yujiro Nagata
Life of this patent
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Abstract
A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a second semi-conductor region formed primarily of semi-amorphous semiconductor. The second semi-conductor region has a higher degree of conductivity than the first semiconductor region so that a semi-conductor element may be formed.
Claims13
A semiconductor device comprising:
- a substrate and
- a non-single crystal semiconductor layer formed on or over the substrate, the non-single crystal semiconductor layer being composed of a first semiconductor region formed primarily of a first semi-amorphous semiconductor and a second semiconductor region (a) formed primarily of a second semi-amorphous semiconductor containing microcrystalline semiconductor more than the first semi-amorphous semiconductor and (b) having a higher degree of conductivity than the first semiconductor region;
- wherein the first and second semiconductor regions are laterally arranged side by side on or over the substrate.
A semiconductor device comprising:
- a plurality of photoelectric conversion elements formed on a substrate side by side;
- wherein the photoelectric conversion elements each has a first conductive layer as a first electrode formed on the substrate, a non-single-crystal semiconductor layer formed on the first conductive layer, formed of Si, Ge, Si3N.sub.4-x (0<x<4), SiO.sub.2x (0<x<2) or Si.sub.x Ge.sub.1-x (0<x<1), or a material consisting principally thereof and doped with hydrogen or halogen as a dangling bond neutralizer, and a second conductive layer as a second electrode formed on the non-single-crystal semiconductor layer;
- wherein the second conductive layer of one of the photoelectric conversion elements is coupled with the first conductive layer of the next photoelectric conversion element;
- wherein the non-single-crystal semiconductor layers of the photoelectric conversion elements each has a first semiconductor region and a second semiconductor region having a higher degree of conductivity than the first semiconductor region;
- wherein the first and second semiconductor regions are laterally arranged side by side on the first conductive layer;
- and
- wherein the first semiconductor region is formed primarily of a first semiamorphous semiconductor, and wherein the second semiconductor region is formed primarily of a second semiamamorphous semiconductor containing more microcrystalline semiconductor than the first semiamorphous semiconductor.
4 more elements
A semiconductor device comprising:
- a plurality of MIS type transistors formed side by side on a substrate;
- wherein the MIS type transistors each has a non-single-crystal semiconductor layer formed on the substrate an insulating layer formed on the non-single-crystal semiconductor layer and a conductive layer formed on the insulating layer;
- wherein the non-single crystal semiconductor layer is formed of Si, Ge, Si.sub.3 N.sub.4-x (0<x<4), SiO.sub.2-x (0<x<2), SiC.sub.x (0<x<1) or Si.sub.x Ge.sub.1-x (0<x<1), or a material consisting principally thereof and doped with hydrogen or halogen as a dangling bond neutralizer;
- wherein the non-single-crystal semiconductor has a first semiconductor region as a channel region a second and third semiconductor regions as a source and drain regions respectively connected with the opposing sides of the first semiconductor regions, respectively and having a P or N conductivity type and having a higher degree of conductivity than the first region;
- wherein the third, first and second regions are laterally arranged side by side in this order on the substrate;
- wherein the insulating layer is disposed on at least the first semiconductor region as a gate insulating layer;
- wherein the conductive layer is disposed on at least the first semiconductor region through the insulating layer as a gate electrode;
- and
- wherein the first semiconductor region is formed primarily of a first semi-amorphous semiconductor, and wherein the second and third semiconductor regions are formed primarily of a second semi-amorphous semiconductor containing more microcrystalline semiconductor than the first semi-amorphous semiconductor.
6 more elements
Dependencies are inferred from the claim text.