Graphic video overlay system providing stable computer graphics overlayed with video image

A color graphic overlay system for providing high speed, high resolution color graphics display combined with a video image from external video source, comprising:

• a color graphics module and a video mixing module combined to provide a composite of a graphics image overlayed on the video image, said color graphics module having timing means for producing both color graphics horizontal and vertical sync pulses;
• said video mixing module including a video decoder for separating an external video signal into its red, green and blue (RGB) components and for producing an external video composite sync signal therefrom, and sync processor means for synchronizing color graphics signals both horizontally and vertically with said external video composite sync signal;
• said sync processor means including horizontal sync pocessor means for producing a processed horizontal sync pulse that is phase adjustable and ultimately used to lock the horizontal component of said external video composite sync signal to said color graphics horizontal sync pulse, and vertical sync processor means for using said external video composite sync signal to produce external video vertical sync signals for vertically synchronizing said video image and said color graphics image;
• a phase lock loop connected to said horizontal sync processor means for receiving said processed horizontal sync pulse and also connected to said color graphics module for receiving a color graphics horizontal sync pulse, the output of said phase lock loop providing a high frequency clock signal to said timing means in said color grpahics module for generating said color graphics horizontal sync pulse, said phase lock loop providing adjustment of the frequency of said high frequency clock output until said color graphics horizontal sync pulse is in phase with said processed horizontal sync pulse and thereby compensates for minor phase differences;
• and
• said horizontal sync processor means including a valid sync detector for determining a valid sync condition when said external video horizontal sync signal occurs within a sync timing window during which time said external video horizontal sync signal is provided as said processed horizontal sync pulse to said phase lock loop, said horizontal sync processor means alternatively providing an internal standard sync as said processed horizontal sync signal to said phase lock loop in the absence of said valid sync condition, and means for gradually time sliding said sync timing window towards said external video horizontal sync signal until said signal is within said timing window and a valid sync condition exists wherein said external video horizontal signal is provided as said processed horizontal sync pulse to said phase lock loop;
• whereby a tight horizontal and vertical synchronization of said graphics display with said external video image is provided when said external video image is stable, and a tight vertical synchronization and a loose horizontal synchronization of said graphics display with said external video image is provided when said video image may be unstable, thereby maintaining a stable visible video monitor raster and graphics display.

An improved color graphics overlay system for providing high speed, high resolution color graphic display images combined with a video image from an external source including a color graphics module for generating color graphics image signals responsive to an external computer, said color graphics module having timing means for producing both color graphics horizontal and vertical sync pulses, and a video mixing module for generating multiplexed composite image signals for a color monitor responsive to said color graphics image signals and to video image signals from an external video source, wherein the improvement comprises:

• a. said video mixing module including:
• i. a video decoder for separating an external video signal into its red, green and blue (EV-RGB) components and for producing an external video composite sync signal (EV-CSYNC),
• ii. sync processor means responsive to said external video composite sync signal (EV-CSYNC) for synchronizing signals produced by said color graphics module with said video image signals from an external video source,
• iii. a phase lock loop responsive to output signals from said sync processor means and said graphics module for producing clock signals for use by said timing means of said color graphics module as an input to produce said horizontal and vertical sync pulses, and
• iv. multiplexer means for combining said color graphics image signals and said video image signals to form said multiplexed composite image signals;
• b. said sync processor means including:
• i. horizontal sync processor means for filtering said external video composite sync signal (EV-CSYNC) to produce a phase adjustable processed horizontal sync pulse (P-HSYNC), and
• ii. vertical sync processor means for using said external video composite sync signal (EV-CSYNC) to produce external video vertical sync (EV-VSYNC) and external video odd field (EV-ODFIELD) signals for vertically synchronizing said video image and said color graphics images;
• c. said horizontal sync processor means including:
• i. a valid sync detector for determining a valid sync condition when the horizontal component (HC) of the said external video composite sync signal (EV-CSYNC) is within a predetermined phase adjustable sync timing window,
• ii. a sync filter responsive to the output of said valid sync detector for providing either said horizontal component (HC) of said external video composite horizontal sync signal (EV-CSYNC) as said processed horizontal sync pulse (P-HSYNC) when a valid sync condition exists or an internal standard sync signal as said processed horizontal sync signal (P-HSYNC) in the absence of a valid sync condition, and
• iii. means for time sliding said timing window incrementally towards said horizontal component of said external video composite sync signal (EV-CSYNC) until said signal is within said timing window indicating the existence of a valid sync condition wherein said sync filter provides said horizontal component (HC) as said processed horizontal sync pulse (P-HSYNC) to said phaselock loop, and
• d. said horizontal sync processor means, said color graphic timing means and said phase lock loop being interconnected to cause said phase lock loop to adjust the frequency of said clock signals responsive to said processed horizontal sync pulse (P-HSYNC) and said color graphics horizontal sync pulse (CGM-HSYNC) which is in turn responsive to said clock signals until said color graphics horizontal sync pulse (CGM-HSYNC) is in phase with said processed horizontal sync pulse (P-HSYNC),
• whereby said timing window regulates said phase lock loop by slowly time sliding said processed horizontal sync pulse (P-HSYNC) towards said horizontal component (HC) of said external video composite sync signal (EV-CSYNC) until said phas lock loop can compensate by adjustment of the frequency of said clock signals.