Integrated logic circuit having collector node with pull-up and clamp

An integrated logic circuit having a signal input formed by a control electrode of a transistor and plural signal outputs each coupled through a diode to a first main electrode of the transistor, the signal input being connected to means for supplying current, which integrated logic circuit comprises a semiconductor body having a major surface located on an active side of the semiconductor body, a group of regions of a first conductivity type being present on this active side of the semiconductor body, which regions extend on a substrate region of a second conductivity type common to these regions, each of the regions of the first conductivity type being surrounded by an isolation zone which extends from the major surface into the semiconductor body and by means of which at least a number of these regions are isolated from each other at least during operation of the integrated logic circuit, whereby a first region of the first conductivity type belonging to the group of regions forms part of the first main electrode of the transistor and the control electrode of the transistor has a surface zone of the second conductivity type which is situated inside the isolation zone surrounding this first region, a second main electrode of the transistor adjoining the major surface and being separated from the control electrode by a rectifying junction, while at the major surface there is provided a system of signal connections which comprises conductive tracks which are separated from the semiconductor body by an insulating layer, a plurality of these conductive tracks each connecting the first region of the first conductivity type through a diode junction to a further part of the integrated logic circuit, the diode junctions constituting the said diodes which are each connected in forward direction in series with the main current path of the transistor, the means for supplying current comprising a supply line for connecting a supply source and means for supplying current from the supply line to the signal input, while a conductive connection at least comprising a load element is arranged between the supply line and the first main electrode of the transistor, characterized in that a further connection is provided, which comprises the series arrangement of a Schottky diode and a resistor and which connects the first main electrode to the second main electrode of the transistor, the further connection and the main current path of the transistor being arranged parallel to each other with the same current direction.