US 4,572,764 AGranted

Preparation of photoformed plastic multistrate by via formation first

AssigneeE. I. Du Pont de Nemours and Company

InventorRoxy N. Fan

Life of this patent

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Abstract

Process for preparing multilayer printed circuits comprising laminating to a substrate bearing a circuit pattern or electrically conductive surface a photosensitive layer which is tacky or becomes tacky upon exposure; exposing the laminate to actinic radiation through a via image related to the underlying circuit pattern, if present; optionally removing the removable via image of the photosensitive layer in either the exposed or unexposed areas, e.g., with a solvent or peeling apart by removal of a cover sheet, if present; laminating to the remaining tacky photosensitive layer a layer of a second photosensitive composition; exposing the laminate to actinic radiation through a registered image pattern of at least one overlying segment of the via image area and conductive circuit pattern to form an image surface having nontacky areas and removable circuit image areas; removing the removable circuit image areas of the photosensitive layer in the exposed or unexposed areas with a solvent therefor, or peeling apart by means of a cover sheet, if present, the removable via image areas of the lower photosensitive, if present, are removed by a solvent therefor; embedding finely divided material, e.g., copper, into the tacky areas; optionally curing the laminate by means of actinic radiation and/or heat; plating electrolessly to form an interconnected electrically conductive circuit. Additional circuit layers can be added.

Claims28

Dependent claims

A process for preparing a multilayer printed circuit having conductive interconnections which comprises:

(a) laminating to a substrate bearing an electrically conductive surface or circuit pattern a layer of a photosensitive composition which is tacky or becomes tacky upon exposure, the layer optionally having a removable cover sheet;
(b) exposing the laminate to actinic radiation through a via image which is related to the underlying circuit pattern if present leaving removable via image areas overlying at least one segment of the underlying conductive circuit pattern;
(c) optionally removing the removable via image areas of the photosensitive layer in either the exposed or unexposed areas with a solvent therefor or peeling apart by removal of the cover sheet, if present:
(d) laminating to the tacky photosensitive layer remaining from step (b) or step (c) a layer of a second photosensitive composition, the layer optionally having a removable cover sheet;
(e) exposing the laminate of step (d) to actinic radiation through a registered circuit image pattern which is related to the underlying circuit pattern having at least one segment thereof overlying at least one segment of the via image area resulting from step (b) and the underlying conductive circuit pattern to form an image surface having nontacky areas and removable circuit image areas;
(f) removing the removable circuit image areas of the photosensitive layer of step (d) in either the exposed or unexposed areas with a solvent therefor, or peeling apart by removal of the cover sheet, if present;
(g) removing the removable via image areas of the lower photosensitive layer, if present, with a solvent therefor;
(h) embedding finely divided metal, alloy, or plating catalyst material to the tacky image areas;
(i) optionally curing the laminate by exposing the laminate to actinic radiation, and/or heating;
(j) plating electrolessly the metallized or catalyzed vias, the uncovered segments, and overlying circuit image to form an electrically conductive circuit pattern interconnected with electrically conductive vias.

7 more elements

A process for preparing a multilayer printed circuit having conductive interconnections which comprises:

(a) laminating to a substrate bearing an electrically conductive surface or circuit pattern a layer of a tacky photopolymerizable composition optionally having a removable cover sheet;
(b) exposing the laminate to actinic radiation through a via image which is related to the underlying circuit pattern if present leaving removable via image areas overlying at least one segment of the underlying conductive circuit pattern;
(c) optionally removing the removable via image areas of the photopolymerizable layer with a solvent therefor or peeling apart by removal of the cover sheet, if present;
(d) laminating to the tacky photopolymerizable layer remaining from step (b) or step (c) a layer of a second photopolymerizable composition, the layer optionally having a removable cover sheet;
(e) exposing the laminate of step (d) to actinic radiation through a registered circuit image pattern which is related to the underlying circuit pattern having at least one segment thereof overlying at least one segment of the via image area resulting from step (b) and the underlying conductive circuit pattern to form an image surface having nontacky areas and removable circuit image areas;
(f) removing the removable circuit image areas of the photopolymerizable layer of step (d) with a solvent therefor, or peeling apart by removal of the cover sheet, if present;
(g) removing the removable via image areas of the lower photopolymerizable layer, if present, with a solvent therefor;
(h) embedding finely divided metal, alloy, or plating catalyst material to the tacky image areas;
(i) optionally curing the laminate by exposing the laminate to actinic radiation, and/or heating;
(j) plating electrolessly the metallized or catalyzed vias, the uncovered segments, and overlying circuit image to form an electrically conductive circuit pattern interconnected with electrically conductive vias.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 06/681,189Filed 13 Dec 1984
Granted: 25 Feb 1986
Term ends: Not estimatedThe source records don’t support an estimate.

Classification16 codes

H05K 3/0023
Etching of the substrate by chemical or physical means: by exposure and development of a photosensitive insulating layer
H05K 3/184
Characterised by the patterning method: using masks
H05K 3/4661
By building the multilayer layer by layer, i.e. build-up multilayer circuits: adding a circuit layer by direct wet plating, e.g. electroless…
H05K 3/102
In which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern: by bonding of…