Semiconductor device and process for manufacturing the same
AssigneeNippon Telegraph & Telephone Public Corporation
InventorsHakaru Kyuragi, Hideo Oikawa
Life of this patent
Estimating the term…
Loading patent…
AssigneeNippon Telegraph & Telephone Public Corporation
InventorsHakaru Kyuragi, Hideo Oikawa
Estimating the term…
A multilayer structure comprising a Si layer/ a refractory metal oxide layer/ a refractory metal layer/ is subjected to annealing in an atmosphere of hydrogen or an inert gas mixed with hydrogen, thereby converting the multilayer structure into a multilayer structure comprising a Si layer/an inner SiO.sub.2 layer formed by internal oxidation of Si/a refractory metal layer. The inner SiO.sub.2 layer is selectively formed only on the surface of the refractory metal layer, since Si is internally oxidized from the side of the refractory metal layer. In case of gate electrode of a MISFET, the gate electrode and a contact hole for source or drain electrode are positioned in self-alignment with each other via the inner SiO.sub.2 layer. The distance between the gate electrode and the source or drain electrode is determined by the thickness of the inner SiO.sub.2 layer. A semiconductor device with a high density and a high speed is realized.
A process for manufacturing a semiconductor device, comprising the steps of:
Dependencies are inferred from the claim text.