US 4,553,223 AGranted

Static disturbance signal recording system having detachable programming terminal & programmable fixed part with selectively powered buffer memory

AssigneeThomson-CSF

InventorsFrancis Bouhelier, Claude Vialatte

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Abstract

The system includes a basic recorder module where a delay element is followed by a solid state buffer memory, digital interface circuits for transferring the recorded data, processing means, a printer and/or magnetic memory unit, a detachable programming terminal for the dialogue with the recorder and its programming, as well as a separate power supply for the working part, so that the latter is only supplied in the recording mode or during a connection of the programming terminal.

Claims10

Dependent claims

A disturbance signal recording system comprising:

a fixed unit located at a point suitable for detecting a disturbance, said fixed unit including:
(a) processing signal means for continuously receiving input signals and outputting corresponding digital signals;
(b) pretriggering memory means for receiving and delaying said digital signals received from said processing signal means;
(c) disturbance detector means for receiving said digital signals from said processing signal means and detecting which ones of said digital signals are disturbance signals, said disturbance detector means outputting first and second control signals at the beginning of each detected disturbance signal and a third control signal at the end of each detected disturbance signal;
(d) solid state buffer memory means for recording, from said pretriggering memory, said ones of said digital signals which have been detected to be disturbance signals by said disturbance detection means, said recording occurring in response to a record control signal;
(e) programmable control means for receiving said first and third control signals from said disturbance detector means and in response to said first control signal issuing said record control signal to said buffer memory means and in response to said third control signal issuing a power cut-off signal;
(f) first power supply means for continuously supplying power to said processing signal means, said pretriggering memory means, said disturbance detector means and said programmable control means;
and
(g) second power supply means for supplying power to said buffer memory means in response to said second control signal from said disturbance detector means and for cutting off power to said buffer memory means in response to said power cut-off signal from said programmable control means;
a peripheral unit including a storage recording means for recording said disturbance signals recorded in said buffer memory means, and a detachable programming terminal, including a control display unit, for programming said programmable control means;
and
digital interface means for linking said fixed unit and said peripheral unit;
wherein said programmable control means reads said disturbance signals recorded in said buffer memory means and transmits said read disturbance signals via said digital interface means to said peripheral unit for recording in said storage recording means.

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Dependencies are inferred from the claim text.

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Abstract

A disturbance signal recording system comprising:

a fixed unit located at a point suitable for detecting a disturbance, said fixed unit including:
(a) processing signal means for continuously receiving input signals and outputting corresponding digital signals;
(b) pretriggering memory means for receiving and delaying said digital signals received from said processing signal means;
(c) disturbance detector means for receiving said digital signals from said processing signal means and detecting which ones of said digital signals are disturbance signals, said disturbance detector means outputting first and second control signals at the beginning of each detected disturbance signal and a third control signal at the end of each detected disturbance signal;
(d) solid state buffer memory means for recording, from said pretriggering memory, said ones of said digital signals which have been detected to be disturbance signals by said disturbance detection means, said recording occurring in response to a record control signal;
(e) programmable control means for receiving said first and third control signals from said disturbance detector means and in response to said first control signal issuing said record control signal to said buffer memory means and in response to said third control signal issuing a power cut-off signal;
(f) first power supply means for continuously supplying power to said processing signal means, said pretriggering memory means, said disturbance detector means and said programmable control means;
and
(g) second power supply means for supplying power to said buffer memory means in response to said second control signal from said disturbance detector means and for cutting off power to said buffer memory means in response to said power cut-off signal from said programmable control means;
a peripheral unit including a storage recording means for recording said disturbance signals recorded in said buffer memory means, and a detachable programming terminal, including a control display unit, for programming said programmable control means;
and
digital interface means for linking said fixed unit and said peripheral unit;
wherein said programmable control means reads said disturbance signals recorded in said buffer memory means and transmits said read disturbance signals via said digital interface means to said peripheral unit for recording in said storage recording means.

10 more elements