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US 4,547,790 AGranted
Semiconductor device having contacting but electrically isolated regions of opposite conductivity types
AssigneeTokyo Shibaura Denki Kabushiki Kaisha
InventorHideharu Egawa
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes p- and n-type semiconductor layers formed on an insulating substrate and gate electrodes selectively and insulatively formed over the respective p- and n-type semiconductor layers and forming D-type MOS transistors. In this semiconductor device, the p- and n-type semiconductor layers are made in contact with each other, and negative and positive power supply terminals which are respectively set at negative and positive potentials are respectively connected to the p- and n-type semiconductor layers thereby to electrically isolate the p-type and n-type semiconductor layers from each other.
Claims30
A semiconductor device comprising:
- an insulating body formed of substantially an insulating material;
- a p-type semiconductor region formed on said insulating body and constituting at least part of a first semiconductor circuit section;
- an n-type semiconductor region formed on said insulating body and constituting at least part of a second semiconductor circuit section, at least part of said n-type semiconductor region being in contact with said p-type semiconductor region;
- first potential setting means connected to said p-type semiconductor region to set the p-type semiconductor region at a first predetermined operation potential;
- and
- second potential setting means connected to said n-type semiconductor region to set the n-type semiconductor region at a second preferred operation potential higher than the first predetermined operation potential, thereby electrically isolating said p-type and said n-type semiconductor regions from each other.
3 more elements
A semiconductor device comprising:
- an insulating body formed of substantially an insulating material;
- a p-type semiconductor region formed on said insulating body and constituting at least part of a first semiconductor circuit section;
- an n-type semiconductor region formed on said insulating body and constituting at least part of a second semiconductor circuit section, said n-type semiconductor region being at least partly in contact with said p-type semiconductor region;
- first potential setting means connected to said p-type semiconductor region to set the p-type semiconductor region at a first predetermined operation potential;
- and
- second potential setting means connected to said n-type semiconductor region to set the n-type semiconductor region at a second predetermined operation potential being lower than the first predetermined operation potential, the difference between the first and second potentials being not larger than the contact potential difference at the junction between said p-type and n-type semiconductor regions, thereby electrically isolating said p-type and said n-type semiconductor regions from each other.
3 more elements
A semiconductor device comprising:
- an insulating body formed of substantially an insulating material;
- at least one p-type semiconductor region formed on said insulating body;
- at least one n-type semiconductor region formed on said insulating body and at least partly in contact with said at least one p-type semiconductor region;
- a first gate electrode section formed insulatively over said p-type semiconductor region to constitute a p-channel MOS transistor section;
- a second gate electrode section formed insulatively over said one n-type semiconductor region to constitute an n-channel MOS transistor section;
- a first power supply terminal connected to said one p-type semiconductor region and set at a first predetermined operation potential;
- and
- a second power supply terminal connected to said one n-type semiconductor region, and set at a second predetermined operation potential which is higher than the first predetermined operation potential, thereby electrically isolating said p-type and said n-type semiconductor regions from each other.
5 more elements
A semiconductor device comprising:
- an insulating body formed of substantially an insulating material;
- at least one p-type semiconductor region formed on said insulating body
- at least one n-type semiconductor region formed on said insulating body and at least partly in contact with said at least one p-type semiconductor region;
- a first gate electrode section formed insulatively over said one p-type semiconductor region to constitute a p-channel MOS transistor section;
- a second gate electrode section formed insulatively over said one n-type semiconductor region to constitute an n-channel MOS transistor section;
- a first power supply terminal which is connected to said one p-type semiconductor region and which is set at a first predetermined operation potential;
- and
- a second power supply terminal which is connected to said one n-type semiconductor region and which is set at a second predetermined operation potential lower than the first predetermined operation potential, the difference between the first and second predetermined operation potentials being not larger than the contact potential difference at the junction between said p- and n-type semiconductor regions, thereby electrically isolating said p-type and said n-type semiconductor regions from each other.
5 more elements
A semiconductor device comprising:
- an insulation body formed of substantially insulative material;
- a first semiconductor region of one conductivity type formed on said insulation body to comprise at least part of a first semiconductor circuit section;
- a second semiconductor region having a conductivity type opposite to that of said first semiconductor region and formed at least partly in contact with said first semiconductor region on said insulation body to comprise at least part of second semiconductor circuit section;
- and
- first and second power source terminals respectively connected to said first and second semiconductor regions, a voltage being applied between said first and second power source terminals to apply a reverse bias voltage between said first and second semiconductor regions.
2 more elements
A semiconductor device comprising:
- an insulating body formed of substantially an insulating material;
- a p-type semiconductor region formed on said insulating body and constituting at least part of a first semiconductor circuit section;
- an n-type semiconductor region formed on said insulating body and constituting at least part of a second semiconductor circuit section, with at least part of said n-type semiconductor region being in contact with said p-type semiconductor region;
- first potential setting means connected to said p-type semiconductor region for setting one end of said p-type semiconductor region at a first predetermined operation potential;
- reference potential setting means connected to said p-type and n-type semiconductor regions for setting the other end of said p-type semiconductor region and one end of said n-type semiconductor region at a reference potential higher than the first predetermined operation potential;
- and
- second potential setting means continuously connected to said n-type semiconductor region for setting the other end of said n-type semiconductor region at a second predetermined operation potential higher than the reference potential, and for electrically isolating said p-type and said n-type semiconductor regions from each other.
4 more elements
Dependencies are inferred from the claim text.