US 4,546,451 A · Raster graphics display refresh memory architecture offering rapid access speed

Abstract

A raster graphic refresh memory architecture offering increased access speed. The memory takes advantage of the "page mode" of operation of dynamic random-access memory integrated circuit devices which require two separate device addresses for random access to a storage location therein but permit in "page mode" a first address corresponding to a set of storage locations to be maintained while changing the second address for more rapid access. The memory is organized so that a portion of the second device address is allocated to the least significant bits of one dimension of the display address and another portion of the second device is allocated to the least significant bits of another dimension of the display address, thereby forming a two-dimensional cell of storage locations on a single page corresponding to a region on the display. The page can be extended by using a plurality of random-access memory devices and selecting one of the devices using the least significant bits of one dimension of the display address. An addressing scheme is provided which permits simultaneous "page mode" writing of data into multiple storage locations representing contiguous pixels of the display. A mechanism is also provided for reading back data from a plurality of storage locations representing contiguous pixels on the display and storing the data in a temporary storage-shift register for subsequent manipulation.

Claims23

Dependent claims

A memory for use with a graphics display system having a display with two or more dimensions, said memory comprising:

(a) storage means for storing data representative of an image to be displayed, said storage means having a plurality of data storage locations corresponding to respective points of said display, each said data storage location having first and second storage addresses representing row and column addresses within said storage means, said storage means requiring that both said storage addresses be provided thereto sequentially to access an arbitrary storage location therein but permitting access to storage locations which share a common first storage address more rapidly by maintaining said first storage address continuously while said second storage address is provided anew than by providing both said first and said second storage addresses anew to access a data storage location;
(b) first address means for providing to said storage means and continuously maintaining a first storage address for sequential access to a memory cell which comprises a plurality of said data storage locations which share a common first storage address, said common first storage address providing access to a single row within said storage means;
and
(c) second address means for mapping said data storage locations within said memory cell to correspond to points distributed in two or more dimensions of said display.

1 more element

A method for addressing a display memory in a graphics display system having a display with two or more display dimensions, each point of the display having two or more display addresses corresponding respectively to said display dimensions, said display memory having storage means comprising a plurality of data storage locations corresponding to respective points of said display, each said data storage location having first and second storage addresses representing row and column addresses within said storage means, said storage means requiring that both said storage addresses be provided thereto sequentially to access an arbitrary data storage location therein but permitting access to data storage locations which share a common first storage address more rapidly by maintaining said first storage address continuously while said second storage address is provided anew than by providing both said first and said second addresses anew to access a data storage location, said method comprising:

(a) providing to said storage means a first storage address for sequential access to a memory cell which comprises a plurality of said data storage locations which share a common first storage address, said common first storage address providing access to a single row within said storage means;
(b) maintaining said first storage address for sequential access to said data storage locations of which said memory cell is comprised;
and
(c) while said first storage address is being maintained, providing to said storage means a sequence of second storage addresses for storage locations within said storage means which share said common first storage address and are mapped to points distributed in two or more dimensions of said display.

1 more element

Dependencies are inferred from the claim text.

Raster graphics display refresh memory architecture offering rapid access speed

Life of this patent

Raster graphics display refresh memory architecture offering rapid access speed

Life of this patent

Abstract

Claims23