Error analyzer for data communicated by bus protocol
AssigneeLoral Corporation
InventorJayantilal Patel
Life of this patent
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AssigneeLoral Corporation
InventorJayantilal Patel
Estimating the term…
In this system for detecting errors in data handled on a bus in a biphase format in accordance with a certain bus protocol, a pair of signals are established. The digitally measured time durations of these signals accurately represent the respective positive and negative excursion times of the bus data. Certain analyzers detect errors digitally in response to these measured time durations. Each analyzer means includes a half sync detection means for ascertaining that the time duration of each of these signals corresponds to the expected time duration of half of an initial sync signal transmitted in conformance with the bus protocol. A valid sync detector ascertains the consecutive occurrence of valid half sync signals from each analyzer, and provides a valid sync detected signal, and indicates sync type. Additional circuitry determines if following data bit transitions occur with the correct timings, and count the number of data bit timings which occur before detection of the next sync signal or detection of a line inactive condition. Various errors are detected in accordance with these measurements.
In a system for detecting errors in data handled on a bus in a biphase format in accordance with a certain bus protocol, the improvement comprising:
In a system for detecting errors in data handled on a bus, in biphase format, in accordance with a certain bus protocol, the improvement comprising:
In a system for detecting errors in data handled in biphase format on a bus in accordance with a certain bus protocol, the improvement comprising:
In a system for detecting errors in data handled in biphase format on a bus in accordance with a certain bus protocol, the improvement comprising:
Dependencies are inferred from the claim text.