Switching unit for the transfer of digitized signals in PCM system

A switching unit for the selective transfer of multibit data words from a plurality of incoming signal paths, arriving simultaneously during individual time slots of a recurrent frame period assigned to respective communication channels to a like plurality of outgoing signal paths under the control of instructions from an associated command unit, comprising:

• first memory means having cells for the temporary storage of all the data words arriving during one frame period over all said incoming signal paths;
• timing means for controlling the loading of said cells in a predetermined order with arriving data words during each frame period in a writing phase of each time slot;
• second memory means with cells for the storage of routing information identifying the cells of said first memory means whose contents are to be consecutively read out to respective outgoing signal paths during a frame period in a plurality of reading phases of each time slot;
• logic means in two-way communication with said command unit for receiving said routing information therefrom and supplying same to said second memory means;
• and
• multiplexer means controlled by said logic means for supplying said first memory means with addresses from said timing means during writing phases and with addresses from said second memory during reading phases, said multiplexer means being switchable under the control of said logic means in response to an extraction request from said command unit for supplying said first memory means during a reading phase with a particular address available at said logic means designating one of a plurality of channel groups, respectively assigned to said incoming signal paths, for loading successively arriving data words in consecutive writing phases into the cells of said first memory means addressed under the control of said timing means, said logic means including extraction means for generating said particular address in response to a selection code from said command unit and activity information from said input means.

A switching unit for the selective transfer of multibit data words from a plurality of incoming signal paths, arriving simultaneously during individual time slots of a recurrent frame period assigned to respective communication channels to a like plurality of outgoing signal paths under the control of instructions from an associated command unit, comprising:

• first memory means having cells for the temporary storage of all the data words arriving during one frame period over all said incoming signal paths;
• timing means for controlling the loading of said cells in a predetermined order with arriving data words during each frame period in a writing phase of each time slot;
• second memory means with cells for the storage of routing information indentifying the cells of said first memory means whose contents are to be consecutively read out to respective outgoing signal paths during a frame period in a plurality of reading phases of each time slot;
• logic means including changover means having a normal position for addressing the cells of said second memory means in an order established by said timing means and having a further position for addressing a cell of said second memory means out of order in response to a loading instruction from said command unit;
• and
• switchover means connected to an output of said first memory means and controlled by said logic means for transmitting the contents of a selected cell of said first memory means to said command unit in response to a transfer instruction received therefrom, said changeover means being switchable by a blocking instruction from said command unit to load an addressed cell of said second memory means with an inhibiting code, said switchover means being operable to replace the contents of a cell of said first memory means with said inhibiting code during readout of said contents to an outgoing signal path.