Short circuit protector/controller circuit

A short circuit protector/controller circuit for an amplifier driving an electrical load, with the protector/controller circuit being external to the internal circuit of the amplifier, comprising:

• a. a positive voltage supply for the amplifier, in series with the positive current sensing resistor placed in series with the positive power supply input line to the amplifier, such that the voltage across the positive current sensing resistor can be monitored independently for an overload condition;
• b. a negative voltage supply for the amplifier, coupled through a negative current sensing resistor placed in amplifier, such that the voltage across the negative current sensing resistor can be monitored independently for an overload condition;
• c. first means for comparing the voltage across said positive current sensing resistor with a reference threshold voltage which represents an overload circuit condition;
• d. second means for comparing the voltage across said negative current sensing resistor with a reference threshold voltage which represents an overload circuit condition;
• e. a transient and noise suppressor circuit means, coupled to the outputs of said first and second comparing means, for passing an overload signal only when the voltage across either of the positive or negative current sensing resistors exceeds its reference threshold voltage for a given time duration;
• f. a switch timing control circuit means, responsive to said overload signal, for generating periodic T.sub.ON pulses followed by periodic T.sub.OFF periods:
• g. An FET switch means, responsive to said T.sub.ON signals for connecting the amplifier to its electrical load, and for disconnecting the amplifier from its electrical load during said T.sub.OFF periods;
• h. a logic translator and switch drive means for converting from a first level of logic signals produced by said switch timing control circuit means to a second level of logic signals suitable to drive said FET switch means;
• i. an interrupt and control logic circuit means for providing an interface with an associated processor, and having an interrupt auto clear disable input and an interrupt clear input;
• and
• j. a cascadable interrupt logic circuit means for providing cascading of multiple stages of amplification, each having a short circuit protector/controller circuit.