Apparatus for testing an integrated circuit chip without concern as to which of the chip's terminals are inputs or outputs

Abstract

Apparatus is disclosed which provides for testing a wide variety of different types of electrical circuit devices, such as PROM integrated circuit chips, with very little if any programming being required, and without concern as to which of the terminals of the chip are inputs or outputs. The testing apparatus achieves this result by taking advantage of the significant difference in the input and output impedances of most chips to permit treating the logical levels on both inputs and outputs of the chip in a like manner while generating a running signature output in response to a series of input test patterns, the resulting final signature obtained being indicative of the operation of the chip. Provision is also made for testing circuits having internal storage and/or requiring special power or clock inputs.

Dependencies are inferred from the claim text.