Race condition mediator circuit
AssigneeGTE Automatic Electric Inc.
InventorGeorge K. Tarleton
Life of this patent
Estimating the term…
Abstract
A circuit which eliminates race conditions caused by gate delay variation. In the absence of gate delay variations data is made available for a period of time which extends beyond commencement of processing of such data. This circuit prevents gate delay variations from causing processing to commence after the period of time during which data is available. Each of a pair of flip-flops initiates or terminates the data available time period. These flip-flops, an exclusive-or gate and related circuitry are arranged such that the period of time for data availability is not terminated until after processing of such data actually commences.
Claims11
A race condition mediator circuit for use in a processing system which includes a processing unit and a data unit, said processing unit being operative to provide a data request signal and a clock signal, and said data unit being operative to provide a data signal in response to said data request signal, said race condition mediator circuit comprising:
- timing means connected to said processing unit and operative in response to said data request signal to provide a data enable signal;
- first gating means connected between said timing means and said data unit and operative in response to said data enable signal and said data signal to provide a gated data signal;
- and
- output storage means connected to said first gating means and said processing unit and operative in response to said clock signal and said gated data signal to provide a latched data signal;
- said timing means being further operative in response to an absence of said data request and clock signals to inhibit said data enable signal.
Dependencies are inferred from the claim text.