Bus for data processing system with fault cycle operation
AssigneeDigital Equipment Corporation
InventorStephen T. Pomfret
Life of this patent
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Abstract
A digital data processing system including a number of input/output units that communicate with a memory over an input/output bus and through an input/output interface. The input/output interface pipelines data transfers between the input/output units and the memory. The interface includes an incoming and outgoing buffer for queuing requests from the input/output units, and transfers from the memory. In the event of an error in the input/output interface's pipeline buffer, the interface transmits, by means of a fault cycle over the bus, information to the input/output unit that initiated the transfer unit to enable it to recover.
Claims9
An input/output interface unit for engaging in fault cycle operations, said interface unit being for attachment to a data processing system including a plurality of units interconnected by a bus, the bus including lines for transferring information signals including signals representing commands, addresses and data, lines for transferring unit identification signals, and lines for transmitting a confirmation signal indi,cating that the information signals had been received, said interface unit comprising:
- (A) means for connection to said information signal transfer lines and the confirmation signal lines for receiving information signals from the bus, said information signal receiving means including means for transmitting a confirmation signal indicating receipt of the information signals;
- (B) means connected to said information signal receiving means for processing the command and address signals received from said information signal receiving means;
- (C) means connected to said processing means for determining whether an error has occurred during processing of command and address signals following transmission of a confirmation signal;
- and
- (D) means connected to said error detection means and for connection to said information signal transfer lines for transmitting predetermined data signals over the information signal transfer lines to the unit that transmitted the command and address signals, to thereby indicate that it is unable to process the command.
An input/output bus adapter unit for attachment to a data processing system including a plurality of units interconnected by a bus including lines for transferring information including commands, addresses and data, lines for transferring a unit identification, and lines for transmitting a confirmation signal indicating that the information has been received, said adapter unit comprising:
- (A) information signal transfer means for connection to said information signal transfer lines for transmitting information signals onto and receiving information signals from said bus;
- (B) means for connection to said confirmation signal transfer lines and connected to said information signal transfer means for receiving a confirmation signal a predetermined time after transmitting an information signal over said information signal transfer means;
- (C) error signal receiving means for connection to said information signal transfer lines for receiving signals from the bus after receipt of a confirmation signal from said confirmation signal transfer means indicating that an error has occurred in another unit to which it has transmitted a command;
- and
- (D) means connected to said error signal receiving means for using the information stored in the error signal receiving means.
A data processing system comprising a plurality of units connected by a bus including lines for transferring information signals including command, address and data signals, and lines for transferring a confirmation signal, one of said units comprising:
- (A) means connected to said information signal transfer lines and the confirmation signal lines for receiving information signals from the bus, said information signal receiving means including means for transmitting a confirmation signal indicating receipt of the information a predetermined time after receipt of the information signals;
- (B) means connected to said information signal receiving means for processing the command and address signals received from said information signal receiving means;
- (C) means connected to said processing means for determining whether an error has occurred during processing of command and address signals following transmission of a confirmation signal;
- and
- (D) means connected to said error detection means and said information signal transfer lines for transmitting predetermined data signals over the information signal transfer lines to the unit that transmitted the command and address signals, to thereby indicate that it is unable to process the command;
- and
- a second of said units comprising
- (A) information signal transfer means connected to said information signal transfer means for transmitting information signals onto and receiving information signals from said bus;
- (B) means connected to said confirmation signal transfer means and said information signal transfer means for receiving a confirmation signal a predetermined time after transmitting an information signal over said information signal transfer means;
- (C) error signal receiving means connected to said information signal transfer means for receiving signals from the bus after receipt of a confirmation signal from said confirmation signal transfer means indicating that an error has occurred in another unit to which it has transmitted a command;
- and
- (D) means connected to said error signal receiving means for using the information stored in the error signal receiving means.
Dependencies are inferred from the claim text.