US 4,543,626 AGranted

Apparatus and method for controlling digital data processing system employing multiple processors

AssigneeDigital Equipment Corporation

InventorsRobert Bean, Edward A. Gardner, Michael Chow, Barry L. Rubinson, Richard F. Lary, Robert Blackledge

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Abstract

A control arrangement for coordinating operations of multiple processors in a multiprocessor system in response to a command. Each command is associated with a route comprising a sequence of route vectors, each identifying an operation to be performed to execute the command, as well as the process, or station, to execute the route vector. In response to the receipt of a command, a control block is generated identifying the first route vector in the route associated with the command. Each station has a work queue containing control blocks, which the station retrieves and processes sequentially. The control block is first sent to the work queue of the station to perform the first operation. When the station gets to the control block, it performs the operation required by the route vector, modifies the control block to identify the next route vector in the sequence, and transfers the control block to the work queue of the station to perform the operation required by the next route vector in the route.

Claims49

Dependent claims

A data processing system for executing commands, each command requiring a plurality of sequentially-performed operations, comprising memory means, source processor means and a plurality of stations;

A. said memory means for storing a route for each command, each route comprising a sequence of route vectors each including an operation specifying portion identifying an operation to be performed in partial execution of the command and a station specifying portion identifying a station for performing the identified operation;
B. source processor means comprising
(1) means connected to said memory means for generating, in response to a command, a control block containing a pointer identifying the first route vector in the route associated with the command;
and
(2) control block transmitting means connected to said generating means and to all of said stations for coupling the generated control block to the station to process the first route in the route vector;
C. each station comprising:
(1) work queue means connected to said control block transmitting means and to said other stations for receiving and storing control blocks in a queue;
(2) means connected to said work queue means for sequentially retrieving the control blocks from said work queue means;
(3) processing means connected to said retrieving means and to said memory means for retrieving the route vector from said memory means identified by the pointer in the retrieved control block and for performing the operation specified by the vector;
and
(4) transfer means connected to said processing means and to the k queue means of the other stations for advancing the route vector pointer in the control block to identify the next route vector in the route and for transferring the control block to the work queue means of the station that is to execute the route vector identified by the route vector pointer.

8 more elements

A station for connection in a data processing system that executes commands requiring a plurality of operations, the data processing system including a plurality of stations and a memory means for storing in predetermined locations a route for each command, each route comprising a plurality of route vectors each including an operation specifying portion identifying an operation to be performed by a station in partial execution of the command, said data processing means further comprising source processing means for generating, in response to a command, a control block containing a pointer identifying the first route vector in the route associated with the command and for transmitting the control block to a station, the station comprising:

(1) work queue means connected to said source processor means and to said other stations for receiving and storing control blocks in a queue;
(2) means connected to said work queue means for sequentially retrieving the control blocks from said work queue means;
(3) processing means connected to said retrieving means and to said memory means for retrieving the route vector from said memory means identified by the pointer in the retrieved control block and for performing the operation specified by the route vector;
and
(4) transfer means connected to said processing means and to the work queue means of the other stations for advancing the route vector pointer in the control block to identify the next route vector and for transferring the control block to the work queue means of the station that is to execute the route vector identified by the route vector pointer.

2 more elements

A method of controlling a multiprocessor system which executes commands, one of the processors comprising a source processor and the other processors comprising execution processors, the commands requiring a plurality of operations each performed by a selected one of the execution processors in the multiprocessor system, each command being associated with a route that comprises a series of route vectors each identifying an operation to be performed and the execution processor to perform the operation, each execution processor including a work queue for storing control blocks, the method comprising the steps of:

a. the source processor;
(i) generating a control block in response to the receipt of a command, the control block including a route vector pointer identifying the first route vector in a route, and
(ii) coupling the control block to the work queue of the execution processor identified by the first route vector in the identified route,
B. each execution processor:
(i) serially retrieving control blocks from its associated work queue and performing the operation required by the route vector identified by the control block,
(ii) advancing the route vector pointer in the control block to identify the next route vector in the route, and
(iii) coupling the control block to the work queue of the execution processor identified by the route vector identified by the advanced route vector pointer.

4 more elements

A peripheral controller for connection to a host data processing system for controlling transfers of data between external units, including the host system and a peripheral unit, in response to commands from the host system, said peripheral controller comprising a plurality of execution processor means each for connection to an external unit, said peripheral controller further including:

A. memory means including control storage means for storing a route for each command, each route including a sequence of route vectors each including an operation specifying portion identifying an operation to be performed in execution of the command and an execution processor specifying portion identifying and execution processor means for performing the identified operation,
B. source processor means comprising:
(i) means connected to said control storage means for generating, in response to a command from the host system, a control block containing a pointer identifying the first route vector in the route associated with the command and the execution processor means for performing the operation;
and
(ii) control block transmitting means connected to said generating means and to all of said execution processor means for coupling the generated control block to the execution processor means to process the first route in the route vector;
C. each execution processor means comprising:
(i) work queue means connected to said control block transmitting means and to said other execution processor means for receiving and storing control blocks,
(ii) means connected to said work queue means for sequentially retrieving the control blocks from its work queue means,
(iii) processing means connected to said retrieving means and to said memory means for retrieving the route vector from said memory means identified by the route vector pointer in the retrieved control block and for performing the operation specified by the identified route vector, and
(iv) transfer means connected to said processing means and to the work queue means of the other execution processors for advancing the route vector pointer in the control block to identify the next route vector in the route and for transferring the control block to the work queue means of the execution processor means that is to execute the route vector identified by the route vector pointer.

7 more elements

An execution processor for connection in a peripheral controller that controls transfers of data between external units and host system and a peripheral unit in response to commands from the host system, the peripheral controller including a plurality of execution processors and a memory for storing a route for each command comprising a plurality of route vectors each including an operation specifying portion identifying an operation to be performed in partial execution of the command and an execution processor to perform the operation and a source processor means for generating a control block in response to each command containing a pointer identifying the first route vector in the route associated with the command and for coupling the control block to an execution processor, the execution processor being for connection to an external unit and comprising:

(i) work queue means connected to said source processor means and to said other execution processors for receiving and storing control blocks,
(ii) means connected to said work queue means for sequentially retrieving the control blocks from said work queue means,
(iii) processing means connected to said retrieving means and to said memory means for retrieving the route vector from said memory means identified by the route vector pointer in the retrieved control block and for performing the operation specified by the identified route vector, and
(iv) transfer means connected to said processing means and to the other execution processors for advancing the route vector pointer in the control block to identify the next route vector in the route and for transferring the control block to the execution processor that is to execute the route vector identified by the route vector pointer.

1 more element

Dependencies are inferred from the claim text.