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US 4,542,486 AGranted
Semiconductor memory device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKenji Anami, Masahiko Yoshimoto, Hirofumi Shinohara, Osamu Tomisawa
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Abstract
A semiconductor memory device is improved as regards current consumption and access time by dividing the memory cells into a plurality of columner groups and providing group selecting lines. Front-end word lines of low resistance are connected to outputs of row decoders, and AND gates receive selecting signals on the group selecting lines and the outputs of the front-end word lines. Word lines of a comparatively short length are connected to the AND outputs.
Claims6
A semiconductor memory device, comprising:
- N memory cell groups, which groups are obtained by dividing a memory cell array into N parts formed by arranging memory cells in matrix form;
- memory cell group selecting lines for selecting one of said memory cell groups;
- row decoders for decoding the row address data of a memory cell group to be accessed;
- front-end word lines connected to the output terminals of said row decoders, respectively.
- AND gates for ANDing selecting signals on said memory cell group selecting lines and output signals of said front-end word lines;
- and
- word lines connected to the output terminals of said AND gates, respectively.
4 more elements
Dependencies are inferred from the claim text.