Semiconductor devices of multi-emitter type

A semiconductor device of a gate-turn-off type comprising:

• a semiconductor substrate having a pair of opposite major surfaces which substrate includes between said major surfaces a plurality of first emitter regions of one conductivity type exposed to one major surface, a first base region of another conductivity type opposite to said one conductivity type adjacent to said first emitter regions and exposed to said one major surface so that said first emitter regions are individually separated and surrounded by said first base region in said one major surface, a second base region of said one conductivity type adjacent to said first base region, and a second emitter region of said another conductivity type adjacent to said second base region and exposed to the other major surface of the substrate,
• a plurality of first main electrodes disposed directly on said first emitter regions on said one major surface respectively,
• a second main electrode disposed directly on said second emitter region on said other major surface,
• a gate electrode disposed directly on said first base region on said one major surface,
• a composite structure comprising a substantially plate shaped conductor member to be disposed on and electrically connected to said first main electrodes, a ring shaped conductor member to be disposed on and electrically connected to a selected ring shaped area of said second electrode surface, and an insulation member insulating said ring shaped conductor member from said plate shaped conductor member and positioning said ring shaped conductor with respect to said plate shaped conductor member,
• said first emitter regions being disposed radially along the inside and the outside of said ring shaped conductor member, and
• a pair of main external electrodes disposed on said plate shaped conductor member and said second main electrode, respectively.

A gate-turn-off thyristor of a flat package type including a four-layer semiconductor substrate and a pair of flat external electrode structures sandwiching said semiconductor substrate and pressurized thereonto, comprising:

• one of said pair of flat external electrode structures including a conductor plate having a looped groove and a conductor loop accommodated in said looped groove through an insulating material;
• and
• said semiconductor substrate having a surface including a plurality of emitter areas of one conductivity type surrounded by a base area of another conductivity type opposite to said one conductivity type, the base area including a loop portion in register with said conductor loop of said conductor plate, the emitter regions being located at equidistance positions from said looped portion of said base area on both sides of said looped portion of said base area;
• emitter electrodes formed on said emitter areas and being in pressurized contact with said conductor plate;
• and
• a base electrode formed on said base area, surrounding the respective emitter electrodes and including a contact portion on said looped portion in pressurized contact with said conductor loop.