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AssigneeInternational Standard Electric Corporation
InventorsGuido A. M. Verfaillie, Dirk Breynaert
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A demodulator circuit for demodulating a suppressed carrier phase modulated data input signal includes a carrier recovery circuit providing orthogonal reference carrier signals, first and second demodulation circuits for demodulating the signal with the orthogonal reference carrier signals, at least one data estimation circuit for deriving a first data estimation circuit from the demodulated signal, a second demodulated signal being delayed to obtain a signal which in combination with the first data estimation signal controls the carrier recovery circuit. The circuit further includes an automatic gain control which in response to the first data estimation and to a delayed first demodulated signal provides an AGC output signal. The AGC circuit is substantially unaffected by the noise in the input signal because of the matched filters circuit which is matched to the first demodulated signal and which in response thereto provides a filtered output signal having an optimum signal noise ratio at a predetermined instant of each data signal of the first demodulated signal, and a data sampling circuit for sampling the circuit output signal at predetermined instants to provide the first data estimation signal. A sweep generator circuit is operable to control a reference carrier signal in the modulation signal when the quality of a filtered output signal is not above a predetermined level.
Demodulator circuit for demodulating a suppressed carrier phase modulated data input signal, including a carrier recovery circuit providing orthogonal reference carrier signals, first and second demodulation circuits for demodulating said input signal with respective ones of said orthogonal reference carrier signals to provide first and second demodulated signals respectively, at least one data estimation circuit for deriving a first data estimation signal from said first demodulated signal, said second demodulated signal being delayed to obtain a delayed second demodulated signal which in combination with said first data estimation signal controls said carrier recovery circuit, characterized in that said demodulator circuit further includes an AGC circuit (AGCC) which in response to said first data estimation signal (ED1) and to a delayed first demodulated signal (DDD1) derived from said first demodulated signal (DD1) provides an AGC output signal.
Demodulator circuit for demodulating a suppressed carrier phase modulated area input signal, with at least one phaselock loop circuit which includes a demodulation circuit for demodulating said input signal with a reference carrier signal provided by a controlled oscillator, a sweep generator circuit controlling said controlled oscillator, and a first filter circuit filtering a demodulated output signal supplied by said demodulation circuit and providing a filtered output signal, characterized in that it further includes ascertaining means (QEC1, CO5, CO6, NOR2) for ascertaining whether said filtered output signal (FD1) exceeds a reference voltage (VR4) which indicates a predetermined quality level and producing a sweep generator control signal which is indicative of a predetermined quality and which controls said sweep generator circuit (F(s), SGC).
Dependencies are inferred from the claim text.