Impedance buffer with reduced settling time

A buffer containing a first-polarity input transistor, a first-polarity intermediate transistor, a first-polarity output transistor, a second-polarity transistor where the second polarity is opposite to the first polarity, a first current source coupled between a first voltage supply and a node, and a second current source coupled to the first voltage supply, wherein each transistor is a bipolar transistor having an emitter, a base, and a collector, the input transistor has its emitter coupled to the node and its collector coupled to a second voltage supply, the intermediate transistor has its emitter coupled to the node and its collector coupled to the base of the output transistor whose emitter is coupled to the second current source and whose collector is coupled to the second voltage supply, the second-polarity transistor has its emitter coupled to the second voltage supply and its collector coupled to the base of the intermediate transistor, and means couples the collectors of the intermediate and second-polarity transistors, characterized in that the means comprises a resistor.