US 4,541,035 AGranted

Low loss, multilevel silicon circuit board

AssigneeGeneral Electric Company

InventorsRichard O. Carlson, Homer H. Glascock, II, James A. Loughran, Harold F. Webster

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Abstract

A silicon circuit board incorporates multiple levels of patterned conductors. First level upper and lower patterned conductors are situated on an insulation-coated, monocrystalline silicon substrate. Upper and lower, high resistivity, polycrystalline silicon layers, in turn, are situated on the first level upper and lower patterned conductors, respectively. Second level upper and lower patterned conductors are situated over the upper and lower polycrystalline silicon layers. Further levels of patterned conductors in the circuit board may be provided by iteratively forming on the board polycrystalline silicon layers and patterned conductors. Conducting feedthroughs in the circuit board provide electrical communication between various patterened conductors.

Claims8

Dependent claims

A low dielectric loss, multilevel silicon circuit board, comprising:

(a) an inner substrate layer of monocrystalline silicon;
(b) upper and lower insulative layers on upper and lower surfaces of said substrate layer, respectively;
(c) first level upper and lower patterned conductors on said upper and lower insulative layers, respectively;
(d) upper and lower layers of polycrystalline silicon on said upper and lower first level patterned conductors, respectively;
(e) second level upper and lower patterned conductors over said upper and lower layers of polycrystalline silicon, respectively;
and
(f) upper and lower conducting feedthroughs extending through said upper and lower polycrystalline silicon layers, respectively, said upper conducting feedthrough interconnecting said upper first and second level patterned conductors and said lower conducting feedthrough interconnecting said lower first and second level patterned conductors.

4 more elements

Dependencies are inferred from the claim text.