Delay compensation method and apparatus for digital display systems
AssigneeTektronix, Inc.
InventorLee J. Jalovec
Life of this patent
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Abstract
A delay compensation method and apparatus for digital display systems includes a differential clock generator which controls the timing of progenitor digital signals in separate signal-processing channels so that reconstructed horizontal and vertical analog signals arrive at a display device in a precise time match. Thus, timing errors may be adjusted out while the signals are still in digital form to provide an undistorted display.
Claims10
A method of compensating timing errors between signals in separate signal paths, comprising:
- generating digital data at a predetermined rate for a first signal path and a second signal path;
- generating a differential clock signal in synchronism with said data, said differential clock signal comprising a first clock signal and a second clock signal wherein the time occurrence of the second clock signal is selectably variable with respect to the first clock signal;
- and
- synchronizing the time occurrence of data in said first signal path with said first clock signal, and synchronizing the data in said second signal path with said second clock signal.
An apparatus for compensating timing errors between signals in separate signal paths, comprising:
- means for generating digital data at a predetermined rate for a first signal path and a second signal path;
- means for generating a differential clock signal in synchronism with said data, said differential clock signal comprising a first clock signal and a second clock signal wherein the time occurrence of the second clock signal is selectably variable in time with respect to the first clock signal;
- and
- means for synchronizing the time occurrence of data in said first signal path with said first clock signal and data in said second signal path with said second clock signal.
Dependencies are inferred from the claim text.