Chip to chip information bit transmission process and device
AssigneeInternational Business Machines Corporation
InventorsGerard Boudon, Pierre Mollier, Gerard Lebesherais
Life of this patent
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Abstract
In the transmitting chip, the bits are serialized and applied to a coding circuit in which bit stream (D) and its complement (D) are transformed into two signals (PH1 and PH2) under the control of a saw-tooth clock signal CK'. Signals (PH1 and PH2) are sent to the receiving chip, wherein they are applied to a decoding circuit which generates two signals (DJ) and (DK) representative of the data bits and a recovered clock signal CLK. The three signals (DJ, DK and CLK) as well as a frame signal (F) are used by a converting and demultiplexing circuit for assembling bytes of parallel data bits.
Claims8
A process for transmitting information bits generated by first circuits on a first chip to second circuits on a second chip, in which the bits to be transmitted belong to a serialized bit stream, one bit per clock periods, characterized in that it includes the following steps:
- generating in the first chip a saw-tooth signal (CK') having an amplitude higher than the amplitude of the bits to be transmitted and a period of two clock periods,
- generating in the first chip a first and a second signal PH1 and PH2 from the bit stream (D) and its complement (D), said first signal being at a first level when the bit stream level is higher than the saw-tooth clock signal level and being at a second level when the bit stream level is lower than the saw-tooth clock signal level, and the second signal being at the first level when the bit stream complement level is higher than the saw-tooth clock signal and being at the second level when the bit stream complement level is lower than the saw-tooth clock signal level,
- transmitting the first and second signals to the second chip, and
- generating in said second chip from the first and second received signals, a first and a second signal (DJ and DK) representative of the bit condition and a recovered clock signal (CLK) defining each bit period.
Dependencies are inferred from the claim text.