Fail-safe speed control system for motor vehicles
AssigneeNippondenso Co., Ltd.
InventorsYoshikazu Mizuno, Akira Ikuma
Life of this patent
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AssigneeNippondenso Co., Ltd.
InventorsYoshikazu Mizuno, Akira Ikuma
Estimating the term…
An automatic speed control system comprises a bistable device, a coincidence gate and a monitor circuit which monitors the speed control element of an engine and applies a first input signal to the coincidence gate if malfunction occurs in the speed control element. The coincidence gate provides a reset signal to the bistable device when it simultaneously receives a second input signal from a microprocessor. The microprocessor verifies the operating conditions of the bistable device before the system is switched to automatic mode and sets the bistable device into a condition for receiving the reset signal from the coincidence gate. During automatic control mode, the microprocessor constantly checks the bistable device if it turns to the reset condition while controlling the speed control element. Whenever the microprocessor detects a reset condition in the bistable device, it enables the speed control element to allow the engine to be controlled on manual mode. A malfunction of the microprocessor will also cause the coincidence gate to provide a reset signal to the bistable device.
A speed control system for a vehicle having an engine, the engine having a speed adjusting element controllable in response to a manual control means, comprising:
A speed control system for a vehicle having an engine, the engine having a speed adjusting element controllable in response to a manaul control means, comprising:
Dependencies are inferred from the claim text.