Apparatus for inter-processor data transfer in a multi-processor system
AssigneeElevator GmbH
InventorPaavo Saaksjarvi
Life of this patent
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Abstract
This procedure and apparatus is used for transferring data between central units or processors in a multi-processor system. The system includes one or several central units (3) with memories (4). The data to be transferred between central units (3) or processors are separated from their internal bus (6) by means of joint memories (2) and that the data transfer between the joint memories (2) is effected by a separate copying means (1).
Claims5
A system for transferring data between central units of processors in a multi-processor system, said system comprising central units with central memories, an internal bus for the transmission of data between individual ones of said central units, joint memories, and copying means for clocking the joint memories;
- and wherein
- the central units of processors are separated from said internal bus by said joint memories, a data transfer among all the joint memories is effected by said copying means;
- each of said joint memories includes its own address generation means responsive to common clock synchronization signals of the copying means transmitted to all of the joint memories for simultaneous transfer of data without transference of address signals among all the joint memories and;
- all of said address generation means generate the same address concurrently in response to said clock synchronization signals without a computation of separate addresses, thereby permitting continuous transfer of data independently of any normal operation of said central units.
Dependencies are inferred from the claim text.