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US 4,539,582 AGranted
Anti-short bonding pad structure
AssigneeTokyo Shibaura Denki Kabushiki Kaisha
InventorAkira Kuromaru
Life of this patent
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Abstract
A semiconductor device comprising a semiconductor substrate, a first insulating layer formed on the semiconductor substrate, a bonding pad formed on the first insulating layer, a conductive layer formed on the first insulating layer and adjacent to the bonding pad, and a second insulating layer formed to cover the conductive layer characterized in that the surface of the second insulating layer formed on and near the conductive layer is made at the same level as or lower than the surface of the bonding pad.
Claims8
A semiconductor device comprising:
- a semiconductor substrate;
- a first insulating layer formed on the semiconductor substrate;
- a bonding pad having an upper surface formed on the first insulating layer;
- a conductive layer formed on the first insulating layer adjacent and not directly connected to said bonding pad and spaced from said bonding pad a distance no greater than the widest dimension of said bonding pad;
- and
- a second insulating layer formed to cover the conductive layer,
- an upper surface portion of the second insulating layer which covers said conductive layer being next adjacent and lower than or level with the upper surface of the bonding pad.
4 more elements
Dependencies are inferred from the claim text.