Phase locked loop variable oscillator with switched capacitors

A clock circuit for synchronous operation in relation to transitions in a received signal, comprising:

• an amplifier with terminal means for connecting a tank circuit between an input and an output of the amplifier;
• a passive reactance element;
• switch means being operable for connecting and for disconnecting the reactance element across the amplifier whereby in combination with the tank circuit an oscillator circuit is provided and is operable at either of first and second frequencies;
• a phase detector being responsive to the transitions for indicating a corresponding phase relationship of an oscillatory signal from the oscillator circuit;
• and
• means for generating a control signal for operating the switch means in response to indications from the phase detector, the means for generating the control signal comprising:
• means for generating a time signal in response to the oscillatory signal, the time signal having a period being an integer multiple of the period of the oscillatory signal;
• means for generating a fast control signal, being of a consistent state through the period of the time signal, in response to the indication from the phase detector also being of a consistent state;
• means for generating the slow control signal being of alternate states through the period of time signal wherein a duration of each of the states is determined in response to a ratio of the duration of corresponding states of the fast control signal through a preceding plurality of time signal periods;
• and
• a selection circuit for coupling the fast control signal to the switch means in response to an indication that the indication from the phase detector has been substantially constant in the preceding period of the time signal and for otherwise coupling the slow control signal to the switch means.

A method of controlling an oscillator being operable at predetermined lower and higher frequencies for generating a clock signal of a preferred average frequency for use in a receiver of a digital signal bit stream, the method comprising the steps of:

• (i) controlling up and down directions of counting of occurrences of a predetermined characteristic in the bit stream in response to the phase of the clock being late or early with respect to transitions in the bit stream and terminating said counting when a count value reaches a predetermined range limit;
• (ii) defining a periodic timing interval having a period being an integer multiple of the period of the clock signal;
• (iii) providing a fast control signal corresponding to a most significant bit of the count at moments being defined by the timing interval and thereafter setting the value of the count to a value intermediate of the limits of the range;
• (iv) gating the fast control signal to the oscillator in response to a count corresponding to one of the range limits at moments being defined by the timing interval;
• (v) controlling up and down directions of counting of timing interval occurrences in response to corresponding fast control signal states when the fast control signal is being gated to the oscillator;
• (vi) generating a slow control signal having first and second signal states during each time interval, with a moment of transition between the two states being defined by a count value at an end of each timing interval occurrence;
• and
• (vii) gating the slow control signal to the oscillator in response to a count of step i) being intermediate the range limit at moments defined by the timing interval.

A variable oscillator circuit for supplying clock signals to a receiver of synchronous data signals from a data source, comprising:

• an amplifier having an input and an output, for generating an oscillatory clock signal;
• a pair of terminals for connecting a tank circuit means between the input and the output;
• first and second capacitors each being connected in series with an electronic switch means between a respective one of the terminals and ground;
• a strobe generator for generating strobe signals in response to reception of the data signals by the receiver;
• a phase detector for generating a binary phase indication in response to each occurrence of a strobe signal and a coincident state of the signal at the output of the amplifier;
• and
• controlling means for controlling the electronic switch means to couple or decouple the capacitors in accordance with the binary phase indication and at a moment being defined by a predetermined phase occurrence in the oscillatory signal, whereby switching of the capacitors is phase consistent such that the potentials of each capacitor and the respective terminal of said pair of terminals at the moment of switching are about equal.