US 4,538,285 AGranted

FM-receiver for receiving FM-signals with transmission identification

AssigneeU.S. Philips Corporation

InventorsGerardus C. M. Gielis, Antoon M. M. Van Kessel

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Abstract

FM-receiver for receiving an FM-signal with transmission identification. An aerial input is connected to a tuning unit (1) to which there are connected, in succession, an IF-unit (2), an FM-detection circuit (3), a pilot regeneration circuit (10) for regenerating a pilot, a demodulation arrangement (12) for demodulating the code signal which contains transmission identification information, and a clock regeneration circuit (18) which is connected to both the pilot regeneration circuit (10) and the demodulation arrangement (12). The clock regeneration circuit comprises a resettable phase search circuit (18') for producing a clock signal whose frequency is derived from the regenerated pilot and whose phase is derived from the demodulated code signal, a clock-controlled decoding circuit (13) for decoding the code signal and a clock-controlled signal processing unit (17). For the purpose of stabilizing the processing, for example, for the reproduction of the transmission identification information, more specifically with mobile reception, use is made, in the event of disturbances of the code signal, of correctly decoded bits which were stored during undisturbed reception in a memory circuit ( 15). Only in the event of extreme interferences the phase search circuit (18') of the clock regeneration circuit (18) and also the other clock-controlled circuits (13-17) are reset to correct a possible phase slip of the clock signal.

Claims7

Dependent claims

An FM receiver for receiving an FM signal containing a transmission identification code of the type having an aerial input connected to a tuning unit, coupled to the combination of an IF unit, FM detector, pilot regeneration circuit and a demodulation circuit for demodulating said identification code, a circuit for processing said demodulated identification code comprising:

a clock regeneration circuit connected to said pilot regeneration circuit and said demodulation circuit which includes a resettable phase search circuit for producing a clock signal the frequency of which is derived from a regenerated pilot signal and the phase of which is derived from the demodulated code signal;
a clock controlled decoding circuit for decoding the code signals;
a switchable writing circuit for writing said code signals into a memory circuit;
a memory for receiving said decoded code signals as memory contents;
a reading circuit for reading the contents of said memory;
a signal unit connected to receive said read out memory contents controlled by said clock signal;
and
interference detection means for detecting interference levels of a first and second level, said interference detector means having a control signal generation circuit connected to inhibit said writing circuit when an interference level of said first level is detected and resetting the clock regeneration circuit when interference levels of said second level are received, said first interference level being lower than said second interference level at which noticeable decoding errors occur, the second interference level being substantially equal to the interference level at which a phase slip of the clock signal occurs.

5 more elements

Dependencies are inferred from the claim text.