High-speed multiplier for microcomputer used in digital signal processing system

A single-chip microprocessor device containing a multiplier circuit, and containing clock means to generate repetitive machine state intervals, said multiplier circuit operating to produce a product of first and second operands in a single one of said machine state intervals, said multiplier circuit comprising:

• (a) a first input register for holding said first operand of N bits;
• and means for loading said first operand in a first machine state interval;
• (b) a second input means for holding said second operand of M bits during a second machine state interval following said first interval;
• (c) N/2 static adder levels, each of said static adder levels including a control section having a plurality of inputs connected for receiving said control from said outputs of one of said decoder means, each level except the lowest containing at least M parallel binary adder stages, each stage of each level receiving one of said M bits from said second input means, the lowest level containing at least M adder stages receiving no carry input but only said controls and M bits, means for connecting partial products and carry from one level to the next higher level, but no carry being coupled along adder stages within a level.
• (d) at least M+N dynamic adder stages, means for providing ripple carry along said dynamic adder stages, each stage receiving said partial product outputs from respective ones of said static adder levels, the MSB dynamic adder stages receiving partial product bits from the highest level of said static adder levels in a later part of a third machine state interval following said second machine state interval, the two LSB dynamic adder stages receiving two partial product bits from the lowest level of said static adder levels in an early part of said third machine state, and each pair of dynamic adder stages between LSBs and MSBs receiving two partial product bits from LSB stages of corresponding intervening static adder levels.