US 4,538,224 A · Direct memory access peripheral unit controller

Abstract

A peripheral unit controller loads a microprocessor program received from a host processor into a random access memory of a microprocessor-controlled peripheral unit. The program-controlled microprocessor included in the peripheral unit controls the transfer of data between the host processor and the memory and between the memory and a communication channel data link. The peripheral unit controller includes input and output buffer registers, a direct memory access controller, and a host access buffer. Connected between data and address buses of the peripheral unit, the host access buffer transfers controller addresses received from the host processor on the data bus to the address bus to load a program memory address and program word count into the registers of the direct memory access controller. In response to orders received from the host processor, the direct memory access controller uses the program memory address and word count to address locations in the random access memory in which the microprocessor program is loaded.

Claims20

Dependent claims

A direct memory access peripheral unit controller for loading a peripheral unit program received from a host processor into a peripheral unit;

said peripheral unit having a random access memory, a peripheral processor, a data bus, and an address bus;
said data and address buses interconnecting said memory and said peripheral processor;
said memory having a data portion addressable with a data address for storing data and a program portion addressable with a program address for storing said program;
said peripheral processor being responsive to said program for transferring data between said host processor and said data portion of said memory on said data bus;
said direct memory access peripheral unit controller comprising:
buffer means for transferring information including a controller address, said program address, and said program received from said host processor onto said data bus;
direct memory access controller means having a controller location addressable with said controller address received from said address bus to store said program address received from said host processor on said data bus for addressing said program portion with said program address on said address bus;
and
host processor access means for transferring to said address bus said controller address received from said host processor on said data bus.

6 more elements

A direct memory access peripheral unit controller for loading a peripheral unit program received from a host processor into a peripheral unit;

said peripheral unit having a random access memory, a peripheral unit processor, a data bus, and an address bus;
said data and address buses interconnecting said memory and said peripheral unit processor;
said memory having a data portion addressable with a data address for storing data and a program portion addressable with a program address for storing said program;
said peripheral unit processor being responsive to said program for transferring data between said host processor and said data portion of said memory on said data bus;
said peripheral unit controller comprising:
buffer means for transferring information including a controller address, said program address, and said program received from said host processor onto said data bus;
and
interface controller means having a controller location addressable with said controller address on said address bus and responsive to said controller address and said program address received from said host processor on said data bus for addressing said program portion of said memory to load said program received from said host processor on said data bus into said program portion of said memory.

5 more elements

Dependencies are inferred from the claim text.

Direct memory access peripheral unit controller

Life of this patent

Direct memory access peripheral unit controller

Life of this patent

Abstract

Claims20