Video device synchronization system

A video device synchronization system for a video device coupled to receive and operate in response to an input video signal, the synchronization system comprising:

• a phase detector coupled to receive signals indicating phase relationships of the input video signal and a master sync signal and to generate a phase count signal indicative of the phase difference therebetween;
• a transducer coupled to generate a phase adjustment signal indicative of an operator selected phase adjustment;
• an adder coupled to add the operator selected phase adjustment to the phase difference indicated by the phase count signal to produce a phase command signal indicative of a commended phase difference relative to the input video signal;
• and
• a synchronizing signal generator coupled to receive a pixel rate clock signal synchronized to the input video signal, a signal indicative of the phase of the input video signal and the phase command signal and to generate under control of the pixel rate clock signal at least one output timing signal having a phase relationship to the phase of the input video signal determined in response to the phase command signal.

A video device synchronization system comprising:

• an input sync detector and clock generator coupled to receive a composite video input signal and generate timing and control signals synchronized therewith, the timing and control signals including a pixel clock signal, a master frame reset signal and an input horizontal sync signal having the same phase as the horizontal sync pulses of the composite video input signal;
• a phase detector coupled to receive the input horizontal sync signal and a reference locking signal and generate a phase count signal indicative of any phase difference therebetween;
• and
• a synchronization signal generator coupled to receive the master frame reset signal and information indicative of the phase count signal and to generate a composite sync signal having a phase relative to the master frame reset signal determined by the information indicative of the phase count signal.

A video device synchronization system comprising:

• an input sync detector and clock generator coupled to receive a composite video input signal and generate timing and control signals synchronized therewith, the timing and control signals including a pixel clock signal, a master frame reset signal and an input horizontal sync signal having the same phase as the horizontal sync pulses of the composite video input signal;
• a phase detector coupled to receive the input horizontal sync signal and a reference locking signal and generate a phase count signal indicative of any phase difference therebetween;
• a synchronization signal generator coupled to receive the master frame reset signal and information indicative of the phase count signal and to generate a composite sync signal and an output horizontal burst gate signal having a phase relative to the master frame reset signal determined by the information indicative of the phase count signal;
• and
• a color burst generator including a phase locked loop generating an output color subcarrier signal that is phase locked to a color subcarrier component of the reference locking signal and an output gating circuit coupled to selectively gate therethrough the output color subcarrier signal in response to the output horizontal burst gate signal to produce a gated output color subcarrier signal.

A video device comprising:

• a video signal combiner coupled to receive output video data, an output composite sync signal and an output color burst signal and generate as an output a composite video output signal in response thereto;
• an input sync detector and clock generator circuit coupled to receive a composite video input signal and generate timing and control signals synchronized therewith, the timing and control signals including a pixel rate clock signal, a master frame reset signal and, an input horizontal sync signal;
• a phase detector coupled to receive the input horizontal sync signal and a reference master sync signal component of a locking reference signal and generate a phase count signal indicative of any phase difference therebetween;
• a video transformation device coupled to receive the composite video input signal, the master frame reset signal, and the pixel rate clock signal, and to generate as outputs status information and transformed video data having a phase delayed by an integral number of frame times relative to video data of the composite video input signal;
• an output buffer and interpolator coupled to receive transformed video data from the video transformation device, receive a phase difference command signal responsive to the phase count signal, store the transformed video data and provide the transformed video data to the video signal combiner with a phase relationship relative to the composite video input signal that is responsive to the phase difference command signal;
• a synchronization signal generator coupled to receive the master frame reset signal and the phase difference command signal and to generate said output composite sync signal and an output horizontal burst gate signal with a phase relative to the master frame reset signal determined by the ph signal and an output horizontal burst gate signal with a phase relative to the master frame reset signal determined by the phase difference command signal;
• a processor coupled to receive timing and control signals from the input sync detector and clock generator circuit and operate in response thereto to receive said status information from the video transformation device and generate said control information in response thereto, and to receive said phase count signal and generate said phase difference command signal in response thereto;
• and
• a color burst generator coupled to receive a reference color burst signal component of the locking reference signal and the output horizontal burst gate signal, the color burst generator being coupled to generate a color subcarrier sinewave signal phase locked to the reference color burst signal and to gate the subcarrier sinewave signal under control of the output horizontal burst gate signal to generate said output color burst signal.