In a process for fabrication of bipolar junction transistors, wherein the transistor structure upon which the process is being performed initially includes an n-epitaxial collector formed on a heavily doped p++ substrate;
- the collector having an exposed surface and including an n+ subcollector with an n+ connection to the exposed surface, and the collector being surrounded by a layer of isolating oxide, the process comprising the steps of:
- depositing a layer of polycrystalline or amorphous silicon in-situ doped with boron atoms over the exposed surface of the n-type collector, n+ subcollector and over the isolation oxide at a temperature in the range of approximately 600.degree. C. to 700.degree. C.;
- photomasking the deposited polycrystalline or amorphous silicon layer over the n-collector and a portion of the isolation oxide;
- etching the deposited polycrystalline or amorphous silicon layer to reexpose the n+ sinker to the n+ subcollector and then stripping the photomask to expose the remainder of the deposited layer of silicon;
- recrystallizing the remaining polycrystalline or amorphous silicon layer in an inert environment by thermal annealing the silicon at a temperature low enough to avoid diffusion of dopants from the deposited silicon into the collector but high enough to recrystallize the deposited silicon to form a single crystal base region for the transistor whereby the base region has an abrupt junction with the collector;
- depositing a layer of silicon dioxide over the transistor structure;
- exposing first and second portions of base region and surface of the n+ layer for subsequent contact by photomasking and etching the silicon dioxide;
- photomasking the n+ layer and the first exposed portion of the base region;
- implanting the second portion of the base region with boron ions to form a p+ base contact region therethrough and stripping the photoresist to reexpose the first exposed portion of the base region and the n+ layer;
- depositing a subsequent layer of polysilicon doped with metal atoms selected from the group consisting of phosphorus or arsenic over the transistor structure at a deposition temperature in the range of approximately 600.degree. C. to 700.degree. C.;
- thermal annealing the subsequent layer of polysilicon to increase the concentration of active donors in the subsequent layer of polysilicon, to thereby form an emitter region in contact with the first portion of the base region and a collector contact region in contact with the n+ layer, while annealing the p+ base contact region formed through the second portion of the base region, whereby the p+ base contact region is electrically activated and the emitter region is electrically activated while maintaining an abrupt connection with the first portion of the base region, and
- photomasking and etching the subsequent layer of polysilicon away from all regions with the exception of the collector contact region and the emitter region, which are subsequently contacted by separate metallic connections.