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US 4,517,673 AGranted
Computer-based interlocking system
AssigneeWestinghouse Brake & Signal Co. Ltd.
InventorsChristopher R. Brown, John D. Corrie, William G. J. Wilson
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AssigneeWestinghouse Brake & Signal Co. Ltd.
InventorsChristopher R. Brown, John D. Corrie, William G. J. Wilson
Estimating the term…
An interlocking system comprising a plurality, e.g., three, of parallel sub-systems operating asynchronously to produce identical replicated outputs which are mutually compared to determine the correct output and disqualifying a minority output thereby ensuring high system integrity. Each sub-system includes a similar arrangement for computing the difference between all possible pairs of sub-systems. Comparison of these results with a reference table of all possible difference results and then comparison of the difference equations yields a common factor which is the sub-system producing the error. Action can then be taken to disqualify its output, e.g., by switching-off its power supply. A final output is taken, preferably from one sub-system, with a second as standby. To accomodate asynchronous running, a final output is only acted upon if it is repeated in a succeeding output cycle thus permitting opportunity to disqualify the preferred output if it is judged in error by the other sub-systems and to replace it by the standby.
A control signal interlocking system comprising three parallel sub-systems, each of which is connected to receive the same input data and is arranged to perform a signal interlocking function in a continuously repeated cyclic operation, a sub-system output gating circuit, controlled by a sub-system output selecting logic circuit, for preferentially selecting and connecting a first sub-system output to provide the system output and for alternatively selecting a second sub-system output if the first sub-system is found to be in error, said sub-system output selecting logic circuit comprising a comparator in each sub-system for receiving outputs from all the sub-systems, said comparators including difference determining means for determining difference results between pairs of the sub-system outputs, memory means for storing a reference table of possible difference results, and comparison means connected to said difference determining means and said memory means for comparing the actual difference results determined by said difference determining means with the reference difference results stored by the memory means to determine, if differences exist, if the first sub-system is in error.
Dependencies are inferred from the claim text.