A method of fabricating a plurality of FET devices on a composite substrate which includes forming source, drain, and gate regions in said substrate and making electrical contact thereto, the formation of said composite substrate being comprised of the steps of:
- (a) forming a crystal layer of a semiconductor material on a substrate of an insulator material;
- (b) implanting a given ion species into said semiconductor crystal layer under such conditions that the implanted ions penetrating through said semiconductor crystal layer and into said insulator substrate, at their respective residual energies, are insufficient to significantly damage said insulator substrate such that substrate-originated contaminants are released into said semiconductor layer, a sufficient density of said implanted ions being implanted into said semiconductor crystal layer so as to amorphize a buried layer of said semiconductor crystal layer;
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- (c) annealing said semiconductor material at a given temperature so as to recrystallize said buried layer, said given temperature being appropriate for the remaining portion of said semiconductor crystal layer to act as the primary nucleation seed for the recrystallization of said buried amorphous layer.