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US 4,506,172 AGranted
Decoder circuit utilizing josephson devices
AssigneeFujitsu Limited
InventorShinya Hasuo
Life of this patent
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Abstract
This invention discloses a decoder circuit utilizing Josephson devices where Josephson AND gates, output lines connecting both terminals of each said Josephson device and an input signal line are provided in as many as 2.sup.n in number in the nth stage of plural stages. The Josephson AND gate turns ON with the logical product (AND) of the current flowing into the output line of said Josephson AND gate of the preceding stage and the current flowing into the input signal line of the pertinent stage and causes a current to flow into the respective output line.
Claims20
A decoder circuit, comprising
- a plurality of sequentially connected stages,
- 2.sup.n latch type Josephson devices in each nth one of said stages, wherein n varies from one to the number of said plurality of stages, and said Josephson devices of at least all but the first stage have a two-input AND function,
- each said stage providing a plurality of output signals on a respective plurality of output lines, with each said output line being connected across a respective one of said Josephson devices of the same stage,
- each said second and higher stage having as respective input signals to said Josephson devices thereof said output signals of the preceding stage, and
- means for providing a bias current to each said Josephson device and the respective output line, and a respective address signal to each said Josephson device according to the decoding to be performed.
2 more elements
Dependencies are inferred from the claim text.