Josephson junction latch circuit

A Josephson junction latch circuit of the type adapted to store one bit of data comprising,

• an AND gate comprising at least four Josephson junctions,
• said AND gate having at least one data input and one enable input,
• said data input and said enable input having two logic states,
• a biasing current source connected to said AND gate,
• said biasing current source having two logic clock states,
• a Josephson flip-flop comprising a flux storage loop,
• said flip-flop having a data input coupled to the output of said AND gate,
• said flip-flop having a reset input coupled to a reset input line,
• said flip-flop having a true quantity output,
• said flip-flop comprising a sense line coupled to said true quantity output and having at least one Josephson junction and a source impedance in said sense line adapted to sense the state of flux in said flux storage loop,
• said flux storage loop being set in a high flux state by the presence of a high logic level data input, a high logic level enable input and a high logic level biasing current source clock,
• a Josephson OR logic circuit connected to the output of said sense line to provide an amplified true quantity output,
• a sink line connected to said Josephone OR logic circuits and to a low voltage reference,
• a second stage Josephson junction amplifier having an input branch and an output branch, said input branch being connected to said sink line, said output branch providing an inverted true quantity output,
• whereby, a high logic input to said OR logic circuit switches said OR logic circuit ON and reduces the current in said sink line causing said second stage amplifier to be switched OFF, and
• whereby, a low level logic input to said OR logic circuit switches said OR logic circuit OFF and increases the current in said sink line causing said second stage amplifier to be switched ON.