On-chip SQUID cascade
AssigneeInternational Business Machines Corporation
InventorsCheng-Chung J. Chi, Arthur Davidson, Chang-Chyi Tsuei
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AssigneeInternational Business Machines Corporation
InventorsCheng-Chung J. Chi, Arthur Davidson, Chang-Chyi Tsuei
Estimating the term…
A superconducting circuit including at least two DC SQUID stages integrated on the same superconducting chip and coupled by a circuit providing efficient transfer of current from the first SQUID stage to the second SQUID stage with large bandwidth. Each SQUID stage is comprised of a superconducting loop having at least two Josephson devices therein, there being shunt resistors across the Josephson devices to render them nonhysteretic. The coupling means between stages is directly connected to the shunt resistors of the first stage and includes a transmission line and an impedance circuit for matching the impedance of the transmission line, where the impedance circuit provides a real impedance over a large frequency range up to approximately the frequency of Josephson oscillation of the Josephson devices in DC SQUID. Feedback from the second SQUID stage to the first SQUID stage improves the input dynamic range and linearity of the circuit.
A superconducting circuit having high sensitivity and bandwidth, comprising in combination:
A superconducting circuit, comprising in combination:
An integrated superconducting circuit comprising in combination:
A superconducting circuit comprising in combination:
Dependencies are inferred from the claim text.