Digital and analog phase detector for a frequency synthesizer

A sample and hold phase detector for the phase locked loop portion of a frequency synthesizer capable of being switched to generate any one of a plurality of frequencies, said detector receiving a reference frequency signal and a voltage controlled oscillator signal, said voltage controlled oscillator signal being derived from a voltage controlled oscillator, said phase detector including both analog and digital portions which together generate a detector output voltage signal having a range of voltage values and which are coupled through a loop filter to the voltage controlled oscillator, said phase detector comprising:

• digital detecting means for detecting both the frequency and phase difference between said reference frequency signal and said voltage controlled oscillator signal, said digital detecting means being operative in a first mode to generate a first control signal when said reference frequency signal and said voltage controlled oscillator signal exhibit a difference in frequency, said first control signal including information related to said difference in frequency, and being operative in a second mode when the frequencies of said reference frequency signal and said voltage controlled oscillator signal are substantially equal to periodically detect the phase difference therebetween and to generate a second control signal including information related to the difference in phase therebetween, said digital detecting means further producing a discharge signal when operating in said first mode and said voltage controlled oscillator signal is higher in frequency than said reference frequency signal, said digital detecting means also producing said discharge signal when operating in said second mode following detection of said phase difference;
• energy storing means, coupled to said digital detecting means, for storing said first control signal when said digital detecting means is operating in said first mode, and for storing said second control signal when said digital detecting means is operating in said second mode;
• discharging means, operatively coupled to said energy storing means and responsive to said discharge signal, for substantially completely discharging said energy storing means in response thereto;
• first current amplifier means, coupled to said digital detecting means to be responsive to said first control signal, the output of said first current amplifier means being connected to bypass a portion of said loop filter whenever said digital detecting means enters said first mode, to supply voltage to said voltage controlled oscillator to rapidly tune said voltage controlled oscillator to a desired frequency;
• and
• second current amplifier means, having an input operatively coupled to said energy storing means and responsive to the first or second control signal stored therein, said second current amplifier being adapted to be coupled via said loop filter to said voltage controlled oscillator, for maintaining said voltage controlled oscillator at a desired tuning position when said digital detecting means is operating in said second mode.