Spread spectrum modem

A MODEM apparatus comprising:

• (a) means for adding input binary pair symbols corresponding to data to be transmitted by one-half to obtain octal binary symbols,
• (b) means for differentially phase encoding the octal binary symbols twice sequentially,
• (c) means for phase modulating a carrier signal having a frequency much higher than the octal binary symbol by the octal binary symbols, and
• (d) means for mixing the phase modulated carrier signal with a predetermined coded sequence to obtain a spread spectrum output signal.

A MODEM apparatus comprising:

• (a) means for receiving a digital signal having a first bit rate,
• (b) means for separating the odd and even bits of the digital signal into separate bit streams having a second bit rate half the first bit rate,
• (c) means for time shifting one of the bit streams to time align pairs of bits of the bit streams, each pair defining a symbol,
• (d) means for phase shifting the symbols by .pi./N, for an N-PSK system, where N is a positive integer,
• (e) means for twice differentially phase encoding the phase shifted symbols to provide symbols defined by binary octal digits at the second bit rate, and
• (f) means for phase modulating a predetermined coded sequence amplitude modulated subcarrier having a frequency much higher than the second bit rate, to provide a spread spectrum digital output signal.

A MODEM apparatus comprising:

• (a) means for separating the odd and even bits of a digital input signal into odd and even bit stream having corresponding time aligned pairs of bits, having a predetermined bit rate,
• (b) means for Gray coding said pairs of bits,
• (c) means for phase rotating the Gray coded bit pairs by .pi./N, for an N-PSK system, where N is a positive integer,
• (d) first differential encoding means for differentially encoding the phase rotated bit pairs comprised of means for adding an output signal of the differential encoding means with the phase rotated bit pairs in a modulo 8 adder,
• (e) second differential encoding means for further differentially encoding the bit pairs comprised of means for adding an output signal of the second differential encoding means with the output signal of the first differential encoding means in a second modulo 8 adder, to provide an octal digital signal,
• (f) a memory having a pseudo noise code identical to a type embedded in the input signal stored therein,
• (g) means for sequencing the addresses in the memory during each octal address interval at a frequency much higher than the predetermined bit rate, to provide a memory output signal comprised of digital values defining a spread spectrum signal, and
• (h) means for converting the digital spread spectrum signal to an analog form of spread spectrum signal.

A MODEM apparatus comprising:

• (a) means for receiving a digital spread spectrum signal comprised of double differentially phase encoded .pi./4 phase shifted pairs of binary bits phase modulated on a subcarrier signal having a frequency much higher than the bit rate of the binary symbols,
• (b) a pair of matched filters for coherently detecting the digital spread spectrum signal, one matched to the in-phase component of the spread spectrum signal and one matched to its quadrature component, to provide in-phase and quadrature autocorrelation functions of the spread spectrum digital code amplitude modulating on the subcarrier signal,
• (c) means for differentially decoding the autocorrelation functions to provide in-phase and quadrature digital words comprised of the square of the autocorrelation functions devoid of the subcarrier signal,
• (d) means for passing the in-phase and quadrature digital words through low pass filters having impulse response corresponding to a rectanular pulse of width equal to the symbol period and also through differentiating filters, to provide four signals corresponding to the filtered in-phase and quadrature digital words and the derivatives of the filtered in-phase and quadrature digital words,
• (e) means for differential decoding said two filtered signals to provide a decision variable signal representative of the polarity of each bit of an odd bit data stream, a decision variable signal representative of the polarity of each bit of an even bit data stream,
• (f) means for operating on said four signals to provide a phase error signal,
• (g) means for detecting each negative transition of the phase error signal and forming a first clock signal,
• (h) means for sampling each of the decision varible signals at a time related to each said detected negative transition,
• (i) means for multiplexing the samples of the decision variable signals to form an output data stream, and
• (j) means for multiplying the rate of the first clock signal to provide an output clock signal.