Circuit for digital phase difference measuring and synchronizing between pulse trains
AssigneeITT Industries, Inc.
InventorHerbert Elmis
Life of this patent
Estimating the term…
Abstract
A circuit for digitally evaluating the magnitude of the phase error between a reference and a locally generated train (sequence) of pulses. The reference train (sequence) may be, for example, the received horizontal sync pulse in a television receiver and the locally generated synchronizable horizontal trigger of the receiver. The reference pulse train (sequence) contains statistical noise and noise pulses and by multiple phase error sampling (digital) and averaging a much more accurate phase error measurement is obtained. Circuits for directly synchronizing the local trigger generator from the measured phase error are also included.
Claims45
A digitized circuit for measuring phase difference between a sequence of reference pulses and a pulse sequence, comprising:
- first means including a clock pulse generator operating at a frequency which is at least an order of magnitude higher than that of said pulse sequence and a frequency divider responsive to said clock pulse generator for producing a switching signal at a frequency twice that of said pulse sequence and having a pulse/no-pulse ratio of 1 to 1;
- second means including a first logical AND circuit having inputs responsive to said clock signal, said sequence of reference pulses and said switching signal, said AND circuit supplying output pulses during coincidence of signals at said first logical AND circuit;
- first forward counting means responsive to said first logical AND circuit for producing a digital count in parallel form during the time of output pulses from said first logical AND circuit;
- third means including an inverter and a second logical AND circuit having inputs responsive to said clock signals, said sequence of reference pulses and, through said inverter, said switching signal in inverted form;
- a second forward counting means responsive to the output of said second logical AND circuit for producing a digital count in parallel form during the time of output pulses from said second logical AND circuit;
- and fourth means including a digital subtractor responsive to said parallel digital counts from said first and second forward counters to produce a digital signal representative of said phase difference.
A digital system for measuring the phase difference between a reference pulse sequence and a second pulse sequence, said system comprising:
- first means for providing clock signals at a frequency which is at least an order of magnitude higher than the frequency of said second pulse sequence;
- frequency divider means having an input coupled to said first means for dividing the frequency of said clock signals to provide said second pulse sequence and for providing switching signals having a frequency higher than and having a predetermined harmonic relationship to the frequency of said second pulse sequence;
- first counting means for counting first coincidences of pulses of said reference pulse sequence and said clock signals during each first half cycle of said switching signals to produce first count outputs representative of said first coincidences;
- second counting means for counting second coincidences of pulses of said reference pulse sequence and said clock signals during each second half cycle of said switching signals to produce second count outputs representative of said counted second coincidences;
- and
- second means for generating digit output signals representative of the difference between said counted first and said counted second coincidences.
A digital system comprising:
- a first terminal for receiving a reference pulse sequence;
- a second terminal for receiving a clock pulse sequence;
- means for generating a second pulse sequence;
- means for generating switching signals having a frequency higher than and having a predetermined harmonic relationship to the frequency of said second pulse sequence;
- and
- means for counting first coincidences of pulses of said reference pulse sequence and said clock signals during each first half cycle of said switching signals and for counting second coincidences of pulses of said reference pulse sequence and said clock signals during each second half cycle of said switching signals and for generating momentary phase difference signals by determining the difference between said first and second coincidences of pulses.
A digital system for use with a reference pulse sequence and a pulse sequence comprising:
- a first terminal for receiving reference pulse sequence;
- a second terminal for receiving a clock pulse sequence having a frequency at least an order of magnitude higher than said pulse sequence;
- a frequency divider coupled to said second terminal for generating said pulse sequence;
- means coupled to said frequency divider for generating switching signals from said clock pulse sequence, said switching signals having a frequency twice that of said pulse sequence;
- first logic means for supplying first output pulses during coincidence of said clock pulse sequence and said reference pulse sequence during first half cycles of said switching signals;
- second logic means for supplying second output pulses during coincidences of said clock pulse sequence and said reference pulse sequence during second half cycles of said switching signals;
- first counting means for counting said first output pulses;
- second counting means for counting said second output pulses;
- and
- first means responsive to said first and second counting means for generating first digital phase difference signals from the difference in counts between said first and second counting means.
Dependencies are inferred from the claim text.