Method of making electronic chip with metalized back including a surface stratum of solder
AssigneeNational Semiconductor Corporation
InventorVictor A. Batinovich
Life of this patent
Estimating the term…
Abstract
Electronic chip having a composite stratified metal back and method of making it in which strata of metal and/or metal alloys are deposited on the back of the silicon base or a wafer carrying a plurality of circuit components on its face at least one of the strata being resistant to passage of copper at attaching and operational temperatures, and a stratum of solder is provided on the surface of the previously deposited strata for joining the chip to a lead frame.
Claims11
A method for the manufacture of electronic chips for joining to a metallic lead frame comprising:
- depositing a first stratum of metal in strong adhering relation on the back of a fused silicon base wafer carrying a plurality of electronic circuit elements on its face;
- depositing a stratum of a second metal to which lead or tin based solder will readily adhere;
- depositing a stratum of an alloy of said first and second metals on the surface of said stratum of first metal, said stratum of second metal is deposited on the surface of said stratum of alloy in which the metal of said first stratum is chromium and said second metal is silver;
- depositing a stratum of lead or tin based solder on said stratum of said second metal;
- dividing said wafer into separate electronic chips with said strata adhering to their backs;
- at least one of said first and second metals being resistant to passage of copper atoms at soldering and operational temperatures;
- depositing metal having high heat conductivity as a stratum having a thickness to improve heat conductivity from said silicon base to a lead frame to which said chips may be joined;
- and
- said stratum of solder being of sufficient thickness to form a bond to said lead frame when a chip from said wafer is laid on said lead frame and subjected to heat to fuse said solder.
A method for the manufacture of electronic chips for joining to a metallic lead frame comprising:
- depositing a first stratum of metal in strong adhering relation on the back of a fused silicon base wafer carrying a plurality of electronic circuit elements on its face;
- depositing a stratum of a second metal to which lead or tin based solder will readily adhere;
- depositing a stratum of an alloy of said first and second metals on the surface of said stratum of first metal, said stratum of second metal is deposited on the surface of said stratum of alloy in which the metal of said first stratum is titanium, and said second metal is nickel;
- depositing a stratum of lead or tin based solder on said stratum of said second metal;
- dividing said wafer into separate electronic chips with said strata adhering to their backs;
- at least one of said first and second metals being resistant to passage of copper atoms at soldering and operational temperatures;
- and
- said stratum of solder being of sufficient thickness to form a bond to said lead frame when a chip from said wafer is laid on said lead frame and subjected to heat to fuse said solder.
A method for the manufacture of electronic chips for joining to a metallic lead frame comprising:
- depositing a first stratum of chromium in strong adhering relation on the back of a fused silicon base wafer carrying a plurality of electronic circuit elements on its face;
- depositing a stratum of silver to which lead or tin based solder will readily adhere;
- depositing a stratum of an alloy of said chromium and silver on the surface of said stratum of first metal, said stratum of silver metal is deposited on the surface of said stratum of alloy;
- depositing a stratum of lead or tin based solder on said stratum of silver;
- dividing said wafer into separate electronic chips with said strata adhering to their backs;
- at least one of said chromium and silver being resistant to passage of copper atoms at soldering and operational temperatures;
- and
- said stratum of solder being of sufficient thickness to form a bond to said lead frame when a chip from said wafer is laid on said lead frame and subjected to heat to fuse said solder.
Dependencies are inferred from the claim text.