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US 4,449,063 AGranted
Logic circuit with improved switching
AssigneeFujitsu Limited
InventorsHitoshi Ohmichi, Hiromu Enomoto, Yasushi Yasuda, Yoshiharu Mitono, Taketo Imaizumi
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Abstract
A fundamental logic circuit used, for example, in an electronic computer, comprising an output inverter transistor and a switching transistor which discharges a base charge stored in a storage capacitance in a base-emitter junction of the output inverter transistor when the output inverter transistor changes from the turned on condition to the turned off condition.
Claims6
A fundamental logic circuit for performing a fundamental logic operation comprising:
- input means for receiving an input signal:
- a driver transistor having a base electrode connected to said input means and having emitter and collector electrodes producing output signals;
- an output emitter follower transistor which is driven by the output signal from the collector electrode of said driver transistor;
- an output inverter transistor having a base electrode which is driven by the output signal from the emitter electrode of said driver transistor and which comprises a totem-pole output stage together with said output emitter follower transistor;
- a first switching transistor which is connected between the base electrode of said output inverter transistor and ground, and which removes any base charge from the base of said output inverter transistor;
- and
- a second switching transistor whose collector is connected to the base electrode of said first switching transistor and whose emitter electrode and base electrode are connected between two nodes of said fundamental logic circuit, the potential difference between said two nodes increasing only during a transient period in which said output inverter transistor changes from the turned on condition to the turned off condition, and said first and second switching transistors being turned on temporarily in said transient period.
4 more elements
Dependencies are inferred from the claim text.