Data processing system integrated circuit having modular memory add-on capacity

A method of designing a modular data processing system integrated circuit chip having four sides and including a standard circuit having an arithmetic logic unit, program counter, memory pointers and a permanent section of read/write (RAM) and read only (ROM) memory electrically interconnected by first interconnect means, comprising the steps of:

• positioning additional ROM and RAM memory circuitry on said chip to supplement the memory requirements of said data processing system, said memory circuitry having a segmented, modular geometry, and
• producing second interconnect means to electrically interconnect the additional ROM and RAM memory circuitry with said standard circuitry without disturbing the electrical operation of said standard circuit.