US 4,442,498 AGranted

Arithmetic unit for use in data processing systems

OwnerJosh Roseninventor

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Abstract

A data processing system using unique procedures for handling various arithmetic operations. Thus, in floating point arithmetic mantissa calculations the system uses a novel technique for inserting a round bit into the appropriate bit of the floating point result wherein a look-ahead carry bit generator stage is used for such purpose to reduce the overall mantissa calculation time. Further, the system utilizes unique logic which operates in parallel with the floating point exponent calculation logic for effectively predicting whether or not an overflow or underflow condition will be present in the final exponent result and for informing the system which such conditions have occurred. Moreover, the system utilizes a simplified technique for computing the extension bits which are required in multiply and divide computations wherein a programmable array logic unit and a four-bit adder unit are combined for such purposes.

Claims5

Dependent claims

In a data processing system, an arithmetic logic unit for performing floating point arithmetic which requires unbiased rounding of the floating point arithmetic result, said unit comprising

means for computing an unrounded floating point result comprising a plurality of bit groups, a first selected number of said bit groups being used to form the rounded floating point result and a second selected number of said bit groups being used to determine the round bit for said rounded result;
a plurality of look-ahead logic means for generating carry bits, for insertion into selected ones of said bit groups of said unrounded floating point result, substantially simultaneously with the computation of said unrounded floating point result;
means responsive to said second selected number of bit groups of said unrounded floating point result for determining said round bit;
a portion of a selected one of said look-ahead logic means being responsive to said round bit for inserting said round bit into the least significant bit group of said first selected number of bit groups substantially simultaneously with the insertion of the carry bits into the remaining bit groups of said first selected number thereof to produce said rounded floating point result.

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Dependencies are inferred from the claim text.