Apparatus of fault-handling in a multiprocessing system
AssigneeIntel Corporation
InventorsDavid L. Budde, David G. Carson, Anthony L. Cornish, Brad W. Hosler, David B. Johnson, Craig B. Peterson
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AssigneeIntel Corporation
InventorsDavid L. Budde, David G. Carson, Anthony L. Cornish, Brad W. Hosler, David B. Johnson, Craig B. Peterson
Estimating the term…
A number of intelligent crossbar switches (100) are provided in a matrix of orthogonal lines interconnecting processor (110) and memory control unit (MCU) modules (112). The matrix is composed of processor buses (105) and corresponding error-reporting lines (106); and memory buses (107) with corresponding error-reporting lines (108). At the intersection of these lines is a crossbar switch node (100). The crossbar switches function to pass memory requests from a processor to a memory module attached to an MCU node and to pass any data associated with the requests. The system is organized into confinement areas at the boundaries of which are positioned error-detection mechanisms to deal with information flow occurring across area boundaries. Each crossbar switch and MCU node has means for the logging and signaling of errors to other nodes. Means are provided to reconfigure the system to reroute traffic around the confinement area at fault and for restarting system operation in a possibly degraded mode.
In a data processing system in which a switching matrix provides electrical interconnections between horizontal MACD buses and vertical ACD buses connected in said matrix by means of nodes, a fault-handling mechanism comprising:
In a data processing system in which a switching matrix provides electrical interconnections between horizonal MACD buses and vertical ACD buses connected in said matrix by means of nodes, and in which a fault-handling mechanism provides an error-reporting matrix including horizontal Bus Error Report Lines (BERLs) and vertical Module Error Report Lines (MERLs), said BERLs being associated with said MACD buses such that all nodes sharing an MACD bus are connected with a BERL so that errors occurring in error confinement areas may be rebroadcast over one of said BERLs, said MERLs being associated with said ACD buses such that all nodes sharing an ACD bus are conneted with a MERL so that errors occurring in error-confinement areas may be reported over a corresponding one of said MERLs;
In a data processing system in which a switching matrix provides electrical interconnections between horizontal MACD buses and vertical ACD buses connected in said matrix by means of nodes, and in which a fault-handling mechanism provides an error-reporting matrix including horizontal Bus Error Report Lines (BERLs) and vertical Module Error Report Lines (MERLs), said BERLs being associatd with said MACD buses such that all nodes sharing an MACD bus are connected with a BERL so that errors occurring in error-confinement areas may be reported over one of said BERLs, said MERLs being associated with said ACD buses such that all nodes sharing an ACD bus are connected with a MERL so that errors occurring in error-confinement areas may be rebroadcast over one of said MERLs;
Dependencies are inferred from the claim text.